diff --git a/dts/arm/silabs/siwg917.dtsi b/dts/arm/silabs/siwg917.dtsi
index b1404f475b2..88eb98411fd 100644
--- a/dts/arm/silabs/siwg917.dtsi
+++ b/dts/arm/silabs/siwg917.dtsi
@@ -378,6 +378,19 @@
 				 <&clock0 SIWX91X_CLK_STATIC_ULP_I2S>;
 			status = "disabled";
 		};
+
+		adc0: adc@24043800 {
+			compatible = "silabs,siwx91x-adc";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x24043800 0x214>;
+			interrupts = <11 0>;
+			interrupt-names = "adc0";
+			silabs,adc-sampling-rate = <100000>;
+			clocks = <&clock0 SIWX91X_ADC_CLK>;
+			#io-channel-cells = <1>;
+			status = "disabled";
+		};
 	};
 };
 
diff --git a/dts/bindings/adc/silabs,siwx91x-adc.yaml b/dts/bindings/adc/silabs,siwx91x-adc.yaml
new file mode 100644
index 00000000000..4ed483ed60c
--- /dev/null
+++ b/dts/bindings/adc/silabs,siwx91x-adc.yaml
@@ -0,0 +1,38 @@
+description: Silicon Labs siwx91x ADC
+
+compatible: "silabs,siwx91x-adc"
+
+include: [adc-controller.yaml, pinctrl-device.yaml]
+
+properties:
+  reg:
+    required: true
+
+  interrupts:
+    required: true
+
+  silabs,adc-ref-voltage:
+    type: int
+    description: |
+        ADC reference volatge in mv. This voltage is common for all
+        the channels.
+        Valid range: 1800 - 3600
+    required: true
+
+  silabs,adc-sampling-rate:
+    type: int
+    default: 100000
+    description: |
+        ADC sampling rate in Hz (1-2500000 Hz).
+    required: true
+
+  "#io-channel-cells":
+    const: 1
+    description: |
+        ADC channels should be declared in a sequential manner.
+        Since the hardware allows any pin to be mapped to any channel,
+        enforcing sequential channel declarations does not restrict
+        or limit any functional capability.
+
+io-channel-cells:
+  - input