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samples: drivers: memc: support PSRAM on RW612 while using XIP mode

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RW612 has one FLEXSPI controller, which is capable of supporting
multiple external devices on one board. However, care must be taken when
configuring the FLEXSPI to use multiple devices, as if the FLEXSPI is
configured incorrectly in XIP mode it will fail to read from the
external flash, and the chip will crash.

Make the following changes to the RW configuration for the MEMC sample,
in order to support executing from flash while accessing PSRAM:
- initialize the FLEXSPI MEMC driver first, before the flash or PSRAM
  drivers are initialized
- force the FLEXSPI MEMC driver to reconfigure the FLEXSPI at boot, so
  we can configure the DQS sampling mode for the PSRAM on port B
- only configure the PSRAM pins during FLEXSPI init, so XIP is not
  disrupted
- configure the flash device at boot. This is required so that the MEMC
  driver will not replace the LUTs programmed in the FLEXSPI by the
  bootrom, as it would otherwise not be aware of their existence.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2024-05-09 17:24:28 +00:00 • committed by Anas Nashif
commit 33f90e1eab
2 changed files with 46 additions and 6 deletions
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21
samples/drivers/memc/boards/rd_rw612_bga.conf
View file

@ -1,5 +1,22 @@
# Copyright 2023 NXP
# SPDX-License-Identifier: Apache-2.0
# RW is configured to execute from code ram, so use rom loader to load image
CONFIG_NXP_RW_ROM_RAMLOADER=y
# In order to safely access the PSRAM on port B of the RW FlexSPI peripheral,
# the QSPI flash on port A must be configured by the application. Otherwise,
# the PSRAM configuration will overwrite the LUT entries for the QSPI flash,
# and the application will no longer be able to XIP from the flash.
# To make sure the QSPI flash is configured, enable flash drivers.
CONFIG_FLASH=y
# Initialization priorities are critical here. The FlexSPI MEMC driver must
# initialize first. Then, the QSPI flash driver must initialize to program
# the LUT table for port A. Finally, the PSRAM driver can initialize and
# program the LUT table for port B
CONFIG_MEMC_MCUX_FLEXSPI_INIT_PRIORITY=0
CONFIG_FLASH_INIT_PRIORITY=50
CONFIG_MEMC_INIT_PRIORITY=60
# This board has the PSRAM attached to the same FLEXSPI device as the flash
# chip used for XIP, so we must explicitly enable the FLEXSPI MEMC driver
# to reconfigure the flash device it is executing from
CONFIG_MEMC_MCUX_FLEXSPI_INIT_XIP=y

31
samples/drivers/memc/boards/rd_rw612_bga.overlay
View file

@ -5,10 +5,6 @@
*/
/ {
chosen {
zephyr,flash = &sram_code;
};
aliases {
sram-ext = &is66wvq8m4;
};
@ -17,3 +13,30 @@
&is66wvq8m4 {
status = "okay";
};
&pinctrl {
pinmux_flexspi_safe: pinmux-flexspi-safe {
group0 {
pinmux = <IO_MUX_QUAD_SPI_PSRAM_IO35
IO_MUX_QUAD_SPI_PSRAM_IO36
IO_MUX_QUAD_SPI_PSRAM_IO38
IO_MUX_QUAD_SPI_PSRAM_IO39
IO_MUX_QUAD_SPI_PSRAM_IO40
IO_MUX_QUAD_SPI_PSRAM_IO41>;
slew-rate = "normal";
};
group1 {
pinmux = <IO_MUX_QUAD_SPI_PSRAM_IO37>;
slew-rate = "normal";
bias-pull-down;
};
};
};
/* Override pin control state to use one that only changes the PSRAM pin
* configuration
*/
&flexspi {
pinctrl-0 = <&pinmux_flexspi_safe>;
};