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drivers: espi: host_subs: add pinctrl driver support

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Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in npcx eSPI and host_subs driver.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This commit is contained in:
Mulin Chao 2022-04-19 19:41:49 -07:00 • committed by Maureen Helm
commit 33c7119e87
7 changed files with 30 additions and 23 deletions
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2
boards/arm/npcx7m6fb_evb/npcx7m6fb_evb.dts
View file

@ -91,6 +91,8 @@
&espi0 {
status = "okay";
pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>;
pinctrl-names = "default";
};
&i2c0_0 {

2
boards/arm/npcx9m6f_evb/npcx9m6f_evb.dts
View file

@ -104,6 +104,8 @@
&espi0 {
status = "okay";
pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>;
pinctrl-names = "default";
};
&i2c0_0 {

17
drivers/espi/espi_npcx.c
View file

@ -10,6 +10,7 @@
#include <zephyr/drivers/espi.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/dt-bindings/espi/npcx_espi.h>
#include <zephyr/kernel.h>
#include <soc.h>
@ -27,8 +28,7 @@ struct espi_npcx_config {
/* mapping table between eSPI reset signal and wake-up input */
struct npcx_wui espi_rst_wui;
/* pinmux configuration */
const uint8_t alts_size;
const struct npcx_alt *alts_list;
const struct pinctrl_dev_config *pcfg;
};
struct espi_npcx_data {
@ -829,14 +829,15 @@ static const struct espi_driver_api espi_npcx_driver_api = {
static struct espi_npcx_data espi_npcx_data;
static const struct npcx_alt espi_alts[] = NPCX_DT_ALT_ITEMS_LIST(0);
PINCTRL_DT_INST_DEFINE(0);
BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1,
"only one 'nuvoton_npcx_espi' compatible node may be present");
static const struct espi_npcx_config espi_npcx_config = {
.base = DT_INST_REG_ADDR(0),
.espi_rst_wui = NPCX_DT_WUI_ITEM_BY_NAME(0, espi_rst_wui),
.clk_cfg = NPCX_DT_CLK_CFG_ITEM(0),
.alts_size = ARRAY_SIZE(espi_alts),
.alts_list = espi_alts,
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(0),
};
DEVICE_DT_INST_DEFINE(0, &espi_npcx_init, NULL,
@ -901,7 +902,11 @@ static int espi_npcx_init(const struct device *dev)
&config->espi_rst_wui, espi_vw_espi_rst_isr);
/* Configure pin-mux for eSPI bus device */
npcx_pinctrl_mux_configure(config->alts_list, config->alts_size, 1);
ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
if (ret < 0) {
LOG_ERR("eSPI pinctrl setup failed (%d)", ret);
return ret;
}
/* Configure host sub-modules which HW blocks belong to core domain */
npcx_host_init_subs_core_domain(dev, &data->callbacks);

12
drivers/espi/host_subs_npcx.c
View file

@ -116,6 +116,7 @@
#include <zephyr/drivers/espi.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/kernel.h>
#include <soc.h>
#include "espi_utils.h"
@ -570,16 +571,19 @@ static void host_cus_opcode_disable_interrupts(void)
#if defined(CONFIG_ESPI_PERIPHERAL_UART)
/* host uart pinmux configuration */
static const struct npcx_alt host_uart_alts[] =
NPCX_DT_IO_ALT_ITEMS_LIST(nuvoton_npcx_host_uart, 0);
PINCTRL_DT_DEFINE(DT_INST(0, nuvoton_npcx_host_uart));
BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(nuvoton_npcx_host_uart) == 1,
"only one 'nuvoton_npcx_host_uart' compatible node may be present");
const struct pinctrl_dev_config *huart_cfg =
PINCTRL_DT_DEV_CONFIG_GET(DT_INST(0, nuvoton_npcx_host_uart));
/* Host UART sub-device local functions */
void host_uart_init(void)
{
struct c2h_reg *const inst_c2h = host_sub_cfg.inst_c2h;
/* Configure pin-mux for serial port device */
npcx_pinctrl_mux_configure(host_uart_alts, ARRAY_SIZE(host_uart_alts),
1);
pinctrl_apply_state(huart_cfg, PINCTRL_STATE_DEFAULT);
/* Make sure unlock host access of serial port */
inst_c2h->LKSIOHA &= ~BIT(NPCX_LKSIOHA_LKSPHA);
/* Clear 'Host lock violation occurred' bit of serial port initially */

7
dts/arm/nuvoton/npcx.dtsi
View file

@ -386,8 +386,6 @@
/* clocks for eSPI modules */
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL6 7>;
/* PIN46.47.51.52.53.54.55.57 */
pinctrl-0 = <&alt1_no_lpc_espi>;
/* WUI maps for eSPI signals */
espi-rst-wui = <&wui_espi_rst>;
label = "ESPI_0";
@ -575,11 +573,6 @@
*/
host_uart: io_host_uart {
compatible = "nuvoton,npcx-host-uart";
/* Host serial port pinmux PIN75 86 36 33 42 C7 B3 B2 */
pinctrl-0 = <&altb_rxd_sl &altb_txd_sl
&altb_rts_sl &altb_cts_sl
&altb_ri_sl &altb_dtr_bout_sl
&altb_dcd_sl &altb_dsr_sl>;
label = "HOST_UART_IO";
status = "disabled";
};

7
dts/bindings/espi/nuvoton,npcx-espi.yaml
View file

@ -5,7 +5,7 @@ description: Nuvoton, NPCX-eSPI node
compatible: "nuvoton,npcx-espi"
include: espi-controller.yaml
include: [espi-controller.yaml, pinctrl-device.yaml]
properties:
reg:
@ -17,9 +17,10 @@ properties:
description: configurations of device source clock controller
pinctrl-0:
type: phandles
required: true
description: configurations of pinmux controllers
pinctrl-names:
required: true
espi-rst-wui:
type: phandle

6
dts/bindings/espi/nuvoton,npcx-host-uart.yaml
View file

@ -5,10 +5,10 @@ description: Nuvoton, NPCX-Host UART IO node
compatible: "nuvoton,npcx-host-uart"
include: [base.yaml]
include: [base.yaml, pinctrl-device.yaml]
properties:
pinctrl-0:
type: phandles
required: true
description: configurations of host uart pinmux controllers
pinctrl-names:
required: true