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riscv: linker: replace DT_FLASH_{BASE_ADDRESS,SIZE} with new macros

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The riscv linker scripts utilize DT_FLASH_BASE_ADDRESS and
DT_FLASH_SIZE, as we want to phase out the old generator we need to
replace these defines with macros from devicetree.h.

We support two flash configurations at this point, either a QSPI flash
like on the hifive board or a SoC flash like on the rv32m1_vega.  We
update the linker scripts to check the compat of the zephyr,flash node
and based on if its 'jedec,spi-nor' or 'soc-nv-flash' we determine how
to extract the "flash" base address and size.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-04-28 09:38:12 -05:00 • committed by Kumar Gala
commit 339e3f79eb
2 changed files with 16 additions and 3 deletions
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4
soc/riscv/openisa_rv32m1/linker.ld
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@ -49,8 +49,8 @@
#else
#define ROM_BASE DT_FLASH_BASE_ADDRESS
#define ROM_SIZE (KB(DT_FLASH_SIZE) - VECTOR_SIZE)
#define ROM_BASE DT_REG_ADDR(DT_CHOSEN(zephyr_flash))
#define ROM_SIZE (DT_REG_SIZE(DT_CHOSEN(zephyr_flash)) - VECTOR_SIZE)
#define VECTOR_BASE (ROM_BASE + ROM_SIZE)