Revert "irq: multilevel: compile 3rd level IRQ APIs only when enabled"
This reverts commit 2152b8e414.
This commit is breaking CI.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif
parent
c3b2f44173
commit
3364a35f05
3 changed files with 25 additions and 98 deletions
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@ -32,19 +32,15 @@ typedef union _z_irq {
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uint32_t l1: CONFIG_1ST_LEVEL_INTERRUPT_BITS;
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/* Second level interrupt bits */
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uint32_t l2: CONFIG_2ND_LEVEL_INTERRUPT_BITS;
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#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
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/* Third level interrupt bits */
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uint32_t l3: CONFIG_3RD_LEVEL_INTERRUPT_BITS;
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#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
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} bits;
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#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
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/* Third level IRQ's interrupt controller */
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struct {
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/* IRQ of the third level interrupt aggregator */
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uint32_t irq: CONFIG_1ST_LEVEL_INTERRUPT_BITS + CONFIG_2ND_LEVEL_INTERRUPT_BITS;
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} l3_intc;
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#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
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/* Second level IRQ's interrupt controller */
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struct {
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@ -65,20 +61,16 @@ static inline uint32_t _z_l2_irq(_z_irq_t irq)
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return irq.bits.l2 - 1;
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}
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#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
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static inline uint32_t _z_l3_irq(_z_irq_t irq)
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{
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return irq.bits.l3 - 1;
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}
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#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
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static inline unsigned int _z_irq_get_level(_z_irq_t z_irq)
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{
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#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
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if (z_irq.bits.l3 != 0) {
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return 3;
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}
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#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
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if (z_irq.bits.l2 != 0) {
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return 2;
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@ -150,9 +142,7 @@ static inline unsigned int irq_to_level_2(unsigned int irq)
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.bits = {
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.l1 = 0,
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.l2 = irq + 1,
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#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
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.l3 = 0,
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#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
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},
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};
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@ -178,7 +168,6 @@ static inline unsigned int irq_parent_level_2(unsigned int irq)
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return _z_l1_irq(z_irq);
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}
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#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
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/**
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* @brief Return the 3rd level interrupt number
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*
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@ -252,7 +241,6 @@ static inline unsigned int irq_parent_level_3(unsigned int irq)
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return _z_l2_irq(z_irq);
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}
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#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
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/**
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* @brief Return the interrupt number for a given level
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@ -268,14 +256,11 @@ static inline unsigned int irq_from_level(unsigned int irq, unsigned int level)
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return irq;
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} else if (level == 2) {
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return irq_from_level_2(irq);
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}
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#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
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else if (level == 3) {
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} else if (level == 3) {
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return irq_from_level_3(irq);
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}
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#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
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/* level is higher than what's supported */
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/* level is higher than 3 */
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__ASSERT_NO_MSG(false);
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return irq;
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}
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@ -294,14 +279,11 @@ static inline unsigned int irq_to_level(unsigned int irq, unsigned int level)
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return irq;
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} else if (level == 2) {
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return irq_to_level_2(irq);
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}
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#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
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else if (level == 3) {
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} else if (level == 3) {
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return irq_to_level_3(irq);
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}
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#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
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/* level is higher than what's supported */
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/* level is higher than 3 */
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__ASSERT_NO_MSG(false);
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return irq;
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}
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@ -321,14 +303,11 @@ static inline unsigned int irq_parent_level(unsigned int irq, unsigned int level
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return irq;
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} else if (level == 2) {
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return irq_parent_level_2(irq);
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}
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#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
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else if (level == 3) {
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} else if (level == 3) {
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return irq_parent_level_3(irq);
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}
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#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
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/* level is higher than what's supported */
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/* level is higher than 3 */
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__ASSERT_NO_MSG(false);
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return irq;
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}
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@ -343,24 +322,19 @@ static inline unsigned int irq_parent_level(unsigned int irq, unsigned int level
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static inline unsigned int irq_get_intc_irq(unsigned int irq)
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{
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const unsigned int level = irq_get_level(irq);
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__ASSERT_NO_MSG(level <= 3);
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_z_irq_t z_irq = {
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.irq = irq,
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};
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#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
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__ASSERT_NO_MSG(level <= 3);
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if (level == 3) {
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return z_irq.l3_intc.irq;
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}
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#else
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__ASSERT_NO_MSG(level <= 2);
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#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
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if (level == 2) {
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} else if (level == 2) {
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return z_irq.l2_intc.irq;
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} else {
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return irq;
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}
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return irq;
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}
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/**
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@ -377,12 +351,8 @@ static inline unsigned int irq_increment(unsigned int irq, unsigned int val)
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.irq = irq,
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};
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if (false) {
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/* so that it evaluates the next condition */
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#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
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} else if (z_irq.bits.l3 != 0) {
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if (z_irq.bits.l3 != 0) {
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z_irq.bits.l3 += val;
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#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
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} else if (z_irq.bits.l2 != 0) {
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z_irq.bits.l2 += val;
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} else {
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@ -12,15 +12,18 @@
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ZTEST(interrupt_feature, test_multi_level_api)
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{
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/* Zephyr multilevel-encoded IRQ */
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const uint32_t irqn_l3 = DT_IRQN(DT_NODELABEL(test_l3_irq));
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const uint32_t irqn_l2 = DT_IRQN(DT_NODELABEL(test_l2_irq));
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const uint32_t irqn_l1 = DT_IRQN(DT_NODELABEL(test_l1_irq));
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/* Raw IRQ specified in the devicetree */
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const uint32_t raw_l3 = DT_IRQ(DT_NODELABEL(test_l3_irq), irq);
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const uint32_t raw_l2 = DT_IRQ(DT_NODELABEL(test_l2_irq), irq);
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const uint32_t raw_l1 = DT_IRQ(DT_NODELABEL(test_l1_irq), irq);
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/**
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* - irq_get_level()
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*/
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zassert_equal(3, irq_get_level(irqn_l3));
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zassert_equal(2, irq_get_level(irqn_l2));
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zassert_equal(1, irq_get_level(irqn_l1));
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@ -29,59 +32,13 @@ ZTEST(interrupt_feature, test_multi_level_api)
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* - irq_to_level_2()
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* - irq_parent_level_2()
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*/
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zassert_equal(irq_from_level_2(irqn_l3), raw_l2);
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zassert_equal(irq_from_level_2(irqn_l2), raw_l2);
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zassert_equal(irq_to_level_2(raw_l2) & irqn_l2, irq_to_level_2(raw_l2));
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zassert_equal(irq_parent_level_2(irqn_l2), raw_l1);
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/**
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* - irq_from_level()
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* - irq_to_level()
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* - irq_parent_level()
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*/
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zassert_equal(irq_from_level(irqn_l2, 2), raw_l2);
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zassert_equal(irq_to_level(raw_l2, 2) & irqn_l2, irq_to_level(raw_l2, 2));
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zassert_equal(irq_parent_level(irqn_l2, 2), raw_l1);
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/**
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* - irq_get_intc_irq()
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*/
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zassert_equal(irq_get_intc_irq(irqn_l2), irqn_l1);
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zassert_equal(irq_get_intc_irq(irqn_l1), irqn_l1);
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const uint32_t irqn_l2_inc = DT_IRQN(DT_NODELABEL(test_l2_irq_inc));
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const uint32_t irqn_l1_inc = DT_IRQN(DT_NODELABEL(test_l1_irq_inc));
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/**
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* - irq_increment()
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*/
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zassert_equal(irq_increment(irqn_l1, 1), irqn_l1_inc);
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zassert_equal(irq_increment(irqn_l2, 2), irqn_l2_inc);
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}
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#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
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ZTEST(interrupt_feature, test_multi_level_api_l3)
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{
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/* Zephyr multilevel-encoded IRQ */
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const uint32_t irqn_l2 = DT_IRQN(DT_NODELABEL(test_l2_irq));
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const uint32_t irqn_l3 = DT_IRQN(DT_NODELABEL(test_l3_irq));
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/* Raw IRQ specified in the devicetree */
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const uint32_t raw_l2 = DT_IRQ(DT_NODELABEL(test_l2_irq), irq);
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const uint32_t raw_l3 = DT_IRQ(DT_NODELABEL(test_l3_irq), irq);
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/**
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* - irq_get_level()
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*/
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zassert_equal(3, irq_get_level(irqn_l3));
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/**
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* - irq_from_level_2()
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*/
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zassert_equal(irq_from_level_2(irqn_l3), raw_l2);
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/**
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* - irq_from_level_3()
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* - irq_to_level_3()
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@ -99,24 +56,32 @@ ZTEST(interrupt_feature, test_multi_level_api_l3)
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* - irq_parent_level()
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*/
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zassert_equal(irq_from_level(irqn_l3, 2), raw_l2);
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zassert_equal(irq_from_level(irqn_l2, 2), raw_l2);
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zassert_equal(irq_from_level(irqn_l3, 3), raw_l3);
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zassert_equal(irq_to_level(raw_l2, 2) & irqn_l2, irq_to_level(raw_l2, 2));
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zassert_equal(irq_to_level(raw_l3, 3) & irqn_l3, irq_to_level(raw_l3, 3));
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zassert_equal(irq_parent_level(irqn_l2, 2), raw_l1);
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zassert_equal(irq_parent_level(irqn_l3, 3), raw_l2);
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/**
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* - irq_get_intc_irq()
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*/
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zassert_equal(irq_get_intc_irq(irqn_l3), irqn_l2);
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zassert_equal(irq_get_intc_irq(irqn_l2), irqn_l1);
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zassert_equal(irq_get_intc_irq(irqn_l1), irqn_l1);
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const uint32_t irqn_l3_inc = DT_IRQN(DT_NODELABEL(test_l3_irq_inc));
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const uint32_t irqn_l2_inc = DT_IRQN(DT_NODELABEL(test_l2_irq_inc));
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const uint32_t irqn_l1_inc = DT_IRQN(DT_NODELABEL(test_l1_irq_inc));
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/**
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* - irq_increment()
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*/
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zassert_equal(irq_increment(irqn_l1, 1), irqn_l1_inc);
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zassert_equal(irq_increment(irqn_l2, 2), irqn_l2_inc);
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zassert_equal(irq_increment(irqn_l3, 3), irqn_l3_inc);
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}
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#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
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ZTEST_SUITE(gen_isr_table_multilevel, NULL, NULL, NULL, NULL, NULL);
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@ -85,11 +85,3 @@ tests:
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- EXTRA_DTC_OVERLAY_FILE="multilevel_irq.overlay"
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extra_configs:
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- CONFIG_TEST_MULTILEVEL_IRQ=y
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arch.interrupt.multilevel_l3:
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filter: CONFIG_MULTI_LEVEL_INTERRUPTS
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extra_args:
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- EXTRA_DTC_OVERLAY_FILE="multilevel_irq.overlay"
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extra_configs:
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- CONFIG_TEST_MULTILEVEL_IRQ=y
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- CONFIG_3RD_LEVEL_INTERRUPTS=y
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- CONFIG_3RD_LEVEL_INTERRUPT_BITS=11
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