config: Rename TEXT_SECTION_OFFSET to ROM_START_OFFSET

The `TEXT_SECTION_OFFSET` symbol is used to specify the offset between
the beginning of the ROM area and the address of the first ROM section.

This commit renames `TEXT_SECTION_OFFSET` to `ROM_START_OFFSET` because
the first ROM section is not always the `.text` section.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>

Kconfig.zephyr

@@ -118,15 +118,15 @@ config FLASH_LOAD_SIZE
 
 endif # HAS_FLASH_LOAD_OFFSET
 
-config TEXT_SECTION_OFFSET
+config ROM_START_OFFSET
 	hex
-	prompt "TEXT section offset" if !BOOTLOADER_MCUBOOT
+	prompt "ROM start offset" if !BOOTLOADER_MCUBOOT
 	default 0x200 if BOOTLOADER_MCUBOOT
 	default 0
 	help
 	  If the application is built for chain-loading by a bootloader this
 	  variable is required to be set to value that leaves sufficient
-	  space between the beginning of the image and the start of the .text
+	  space between the beginning of the image and the start of the first
 	  section to store an image header or any other metadata.
 	  In the particular case of the MCUboot bootloader this reserves enough
 	  space to store the image header, which should also meet vector table
@@ -385,7 +385,7 @@ config BOOTLOADER_MCUBOOT
 	  order for the image generated to be bootable using the MCUboot open
 	  source bootloader. Currently this includes:
 
-	    * Setting TEXT_SECTION_OFFSET to a default value that allows space
+	    * Setting ROM_START_OFFSET to a default value that allows space
 	      for the MCUboot image header
 	    * Activating SW_VECTOR_RELAY_CLIENT on Cortex-M0
 	      (or Armv8-M baseline) targets with no built-in vector relocation

arch/common/CMakeLists.txt

@@ -34,8 +34,8 @@ zephyr_linker_sources_ifdef(CONFIG_NOCACHE_MEMORY
   nocache.ld
 )
 
-# Only ARM, X86 and OPENISA_RV32M1_RISCV32 use TEXT_SECTION_OFFSET.
+# Only ARM, X86 and OPENISA_RV32M1_RISCV32 use ROM_START_OFFSET.
 if (DEFINED CONFIG_ARM OR DEFINED CONFIG_X86
     OR DEFINED CONFIG_SOC_OPENISA_RV32M1_RISCV32)
-  zephyr_linker_sources(ROM_START SORT_KEY 0x0 text_section_offset.ld)
+  zephyr_linker_sources(ROM_START SORT_KEY 0x0 rom_start_offset.ld)
 endif()

arch/common/rom_start_offset.ld

@@ -4,5 +4,5 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-. = CONFIG_TEXT_SECTION_OFFSET;
+. = CONFIG_ROM_START_OFFSET;
 . = ALIGN(4);

boards/xtensa/intel_s1000_crb/Kconfig.defconfig

@@ -49,7 +49,7 @@ config HEAP_MEM_POOL_SIZE
 	default 1024
 	depends on DMA_DW
 
-config TEXT_SECTION_OFFSET
+config ROM_START_OFFSET
 	default 0x100
 	depends on BOOTLOADER_MCUBOOT
 

scripts/west_commands/sign.py

@@ -205,7 +205,7 @@ class ImgtoolSigner(Signer):
 
         tool_path = self.find_imgtool(command, args)
         # The vector table offset is set in Kconfig:
-        vtoff = self.get_cfg(command, bcfg, 'CONFIG_TEXT_SECTION_OFFSET')
+        vtoff = self.get_cfg(command, bcfg, 'CONFIG_ROM_START_OFFSET')
         # Flash device write alignment and the partition's slot size
         # come from devicetree:
         flash = self.edt_flash_node(b, cache)
@@ -228,7 +228,7 @@ class ImgtoolSigner(Signer):
         log.banner('image configuration:')
         log.inf('partition offset: {0} (0x{0:x})'.format(addr))
         log.inf('partition size: {0} (0x{0:x})'.format(size))
-        log.inf('text section offset: {0} (0x{0:x})'.format(vtoff))
+        log.inf('rom start offset: {0} (0x{0:x})'.format(vtoff))
 
         # Base sign command.
         #

soc/arm/nxp_imx/rt/Kconfig.defconfig.series

@@ -8,7 +8,7 @@ if SOC_SERIES_IMX_RT
 config SOC_SERIES
 	default "rt"
 
-config TEXT_SECTION_OFFSET
+config ROM_START_OFFSET
 	default 0x2000 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR
 
 config CLOCK_CONTROL_MCUX_CCM

soc/arm/nxp_imx/rt/soc.c

@@ -85,7 +85,7 @@ const __imx_boot_data_section BOOT_DATA_T boot_data = {
 
 const __imx_boot_ivt_section ivt image_vector_table = {
 	.hdr = IVT_HEADER,
-	.entry = CONFIG_FLASH_BASE_ADDRESS + CONFIG_TEXT_SECTION_OFFSET,
+	.entry = CONFIG_FLASH_BASE_ADDRESS + CONFIG_ROM_START_OFFSET,
 	.reserved1 = IVT_RSVD,
 #ifdef CONFIG_DEVICE_CONFIGURATION_DATA
 	.dcd = (uint32_t) dcd_data,

soc/arm/ti_simplelink/cc32xx/Kconfig.defconfig.cc3220sf

@@ -15,7 +15,7 @@ config NUM_IRQS
 config SYS_CLOCK_HW_CYCLES_PER_SEC
 	default 80000000
 
-config TEXT_SECTION_OFFSET
+config ROM_START_OFFSET
 	default 0x800 if XIP
 	default 0x0   if !XIP
 

soc/arm/ti_simplelink/cc32xx/Kconfig.defconfig.cc3235sf

@@ -16,7 +16,7 @@ config NUM_IRQS
 config SYS_CLOCK_HW_CYCLES_PER_SEC
 	default 80000000
 
-config TEXT_SECTION_OFFSET
+config ROM_START_OFFSET
 	default 0x800 if XIP
 	default 0x0   if !XIP
 

soc/arm/ti_simplelink/cc32xx/README

@@ -7,4 +7,4 @@ CC3235 Info taken from:
 Notes for CC32XXSF:
  * Text must start at 0x800 offset in flash.  The first 0x800 bytes are
    reserved for the flash header.
- * See CONFIG_TEXT_SECTION_OFFSET.
+ * See CONFIG_ROM_START_OFFSET.

soc/riscv/openisa_rv32m1/linker.ld

@@ -36,7 +36,7 @@
 #define ROM_BASE (DT_REG_ADDR(DT_CHOSEN(zephyr_code_partition)))
 #define ROM_SIZE (DT_REG_SIZE(DT_CHOSEN(zephyr_code_partition)))
 
-#define VECTOR_BASE (ROM_BASE + CONFIG_TEXT_SECTION_OFFSET)
+#define VECTOR_BASE (ROM_BASE + CONFIG_ROM_START_OFFSET)
 
 #else
 

soc/riscv/openisa_rv32m1/vector_table.ld

@@ -6,7 +6,7 @@
  */
 
 /*
- * Respect for CONFIG_TEXT_SECTION_OFFSET is mandatory
+ * Respect for CONFIG_ROM_START_OFFSET is mandatory
  * for MCUboot support, so .reset.* and .exception.*
  * must come after that offset from ROM_BASE.
  */

soc/xtensa/intel_s1000/linker.ld

@@ -201,7 +201,7 @@ SECTIONS
 
   .ResetVector.text : ALIGN(4)
   {
-    . = CONFIG_TEXT_SECTION_OFFSET;
+    . = CONFIG_ROM_START_OFFSET;
     _ResetVector_text_start = ABSOLUTE(.);
     KEEP (*(.ResetVector.text))
     _ResetVector_text_end = ABSOLUTE(.);

subsys/dfu/boot/mcuboot.c

@@ -446,7 +446,7 @@ static int boot_read_v1_header(uint8_t area_id,
 	 *
 	 * Larger values in header_size than BOOT_HEADER_SIZE_V1 are
 	 * possible, e.g. if Zephyr was linked with
-	 * CONFIG_TEXT_SECTION_OFFSET > BOOT_HEADER_SIZE_V1.
+	 * CONFIG_ROM_START_OFFSET > BOOT_HEADER_SIZE_V1.
 	 */
 	if ((v1_raw->header_magic != BOOT_HEADER_MAGIC_V1) ||
 	    (v1_raw->header_size < BOOT_HEADER_SIZE_V1)) {