drivers: i2s_mcux_sai: control MCLK direction with DT property
For the SAI peripheral, the MCLK signal input/output direction is independent from the TX or RX bit clocks directions (TCR2[BCD] and RCR2[BCD]). Introduces mclk-output property. Signed-off-by: Derek Snell <derek.snell@nxp.com>
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3 changed files with 14 additions and 5 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright 2021,2023-2024 NXP Semiconductor INC.
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* Copyright 2021,2023-2025 NXP Semiconductor INC.
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* All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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@ -97,6 +97,7 @@ struct i2s_mcux_config {
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uint32_t mclk_control_base;
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uint32_t mclk_pin_mask;
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uint32_t mclk_pin_offset;
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bool mclk_output;
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uint32_t tx_channel;
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clock_control_subsys_t clk_sub_sys;
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const struct device *ccm_dev;
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@ -487,9 +488,7 @@ static int i2s_mcux_config(const struct device *dev, enum i2s_dir dir,
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memset(&config, 0, sizeof(config));
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const bool is_mclk_slave = i2s_cfg->options & I2S_OPT_BIT_CLK_SLAVE;
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enable_mclk_direction(dev, !is_mclk_slave);
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enable_mclk_direction(dev, dev_cfg->mclk_output);
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get_mclk_rate(dev, &mclk);
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LOG_DBG("mclk is %d", mclk);
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@ -1185,6 +1184,7 @@ static DEVICE_API(i2s, i2s_mcux_driver_api) = {
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.mclk_control_base = DT_REG_ADDR(DT_PHANDLE(DT_DRV_INST(i2s_id), pinmuxes)), \
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.mclk_pin_mask = DT_PHA_BY_IDX(DT_DRV_INST(i2s_id), pinmuxes, 0, mask), \
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.mclk_pin_offset = DT_PHA_BY_IDX(DT_DRV_INST(i2s_id), pinmuxes, 0, offset), \
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.mclk_output = DT_INST_PROP_OR(i2s_id, mclk_output, 0), \
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.clk_sub_sys = \
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(clock_control_subsys_t)DT_INST_CLOCKS_CELL_BY_IDX(i2s_id, 0, name), \
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.ccm_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(i2s_id)), \
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@ -1,4 +1,4 @@
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# Copyright 2021,2023-2024 NXP
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# Copyright 2021,2023-2025 NXP
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# SPDX-License-Identifier: Apache-2.0
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description: NXP mcux SAI-I2S controller
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@ -65,6 +65,11 @@ properties:
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type: int
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description: Clock mux source for SAI root clock
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mclk-output:
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type: boolean
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description: |
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Set if MCLK signal is an output. Hardware default sets MCLK signal as input.
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pinmux-cells:
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- offset
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- mask
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@ -9,3 +9,7 @@
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i2s-node1 = &sai0;
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};
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};
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&sai0 {
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mclk-output;
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};
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