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soc: nxp_imx: configure USB device EHCI controller driver for rt1050

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add usbd1 definition to rt dts file,
set EHCI controller config default value in rt1050 default config file,
add EHCI controller driver MACROs to dts_fixup.h,
initialize EHCI clock in rt soc.c
add HAS_MCUX_USB_EHCI for supported soc in Kconfig.soc

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
This commit is contained in:
Mark Wang 2019-05-05 13:20:04 +08:00 • committed by Maureen Helm
commit 32f8521cce
5 changed files with 57 additions and 0 deletions
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25
soc/arm/nxp_imx/rt/soc.c
View file

@ -13,6 +13,10 @@
#include <arch/cpu.h>
#include <cortex_m/exc.h>
#include <fsl_flexspi_nor_boot.h>
#if CONFIG_USB_DC_NXP_EHCI
#include "usb_phy.h"
#include "usb_dc_mcux.h"
#endif
#ifdef CONFIG_INIT_ARM_PLL
/* ARM PLL configuration for RUN mode */
@ -35,6 +39,13 @@ const clock_usb_pll_config_t usb1PllConfig = {
};
#endif
#if CONFIG_USB_DC_NXP_EHCI
/* USB PHY condfiguration */
#define BOARD_USB_PHY_D_CAL (0x0CU)
#define BOARD_USB_PHY_TXCAL45DP (0x06U)
#define BOARD_USB_PHY_TXCAL45DM (0x06U)
#endif
#ifdef CONFIG_INIT_ENET_PLL
/* ENET PLL configuration for RUN mode */
const clock_enet_pll_config_t ethPllConfig = {
@ -49,6 +60,12 @@ const clock_enet_pll_config_t ethPllConfig = {
};
#endif
#if CONFIG_USB_DC_NXP_EHCI
usb_phy_config_struct_t usbPhyConfig = {
BOARD_USB_PHY_D_CAL, BOARD_USB_PHY_TXCAL45DP, BOARD_USB_PHY_TXCAL45DM,
};
#endif
#ifdef CONFIG_INIT_VIDEO_PLL
const clock_video_pll_config_t videoPllConfig = {
.loopDivider = 31,
@ -160,6 +177,14 @@ static ALWAYS_INLINE void clkInit(void)
CLOCK_SetDiv(kCLOCK_LcdifDiv, 1);
#endif
#if CONFIG_USB_DC_NXP_EHCI
CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usb480M,
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M,
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
USB_EhciPhyInit(kUSB_ControllerEhci0, CPU_XTAL_CLK_HZ, &usbPhyConfig);
#endif
/* Keep the system clock running so SYSTICK can wake up the system from
* wfi.
*/