arm: Support for MKL25Z soc
In order to suppport the FRDM-KL25Z board, it is necessary to make this soc available. Change-Id: Id93a51dcc9ef58118e27db02c30f662eb73d5adb Signed-off-by: Gustavo Denardin <gustavo.denardin@gmail.com>
This commit is contained in:
parent
4ddf525418
commit
32e15637af
9 changed files with 419 additions and 0 deletions
|
@ -22,6 +22,7 @@ config SOC_PART_NUMBER
|
|||
string
|
||||
default SOC_PART_NUMBER_KINETIS_K6X if SOC_SERIES_KINETIS_K6X
|
||||
default SOC_PART_NUMBER_KINETIS_KWX if SOC_SERIES_KINETIS_KWX
|
||||
default SOC_PART_NUMBER_KINETIS_KL2X if SOC_SERIES_KINETIS_KL2X
|
||||
help
|
||||
This string holds the full part number of the SoC. It is a hidden option
|
||||
that you should not set directly. The part number selection choice defines
|
||||
|
|
68
arch/arm/soc/nxp_kinetis/kl2x/Kconfig.defconfig.mkl25z4
Normal file
68
arch/arm/soc/nxp_kinetis/kl2x/Kconfig.defconfig.mkl25z4
Normal file
|
@ -0,0 +1,68 @@
|
|||
# Kconfig - Kinetis KL2x SoC configuration options
|
||||
#
|
||||
# Copyright (c) 2017, NXP
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
||||
if SOC_MKL25Z4
|
||||
|
||||
config SOC
|
||||
string
|
||||
default mkl25z4
|
||||
|
||||
if !HAS_DTS
|
||||
|
||||
config NUM_IRQ_PRIO_BITS
|
||||
int
|
||||
default 2
|
||||
|
||||
config NUM_IRQS
|
||||
int
|
||||
default 32
|
||||
|
||||
endif # !HAS_DTS
|
||||
|
||||
if PINMUX
|
||||
|
||||
config PINMUX_MCUX
|
||||
def_bool y
|
||||
|
||||
endif # PINMUX
|
||||
|
||||
if GPIO
|
||||
|
||||
config GPIO_MCUX
|
||||
def_bool y
|
||||
|
||||
endif # GPIO
|
||||
|
||||
if SERIAL
|
||||
|
||||
config UART_MCUX
|
||||
def_bool y
|
||||
|
||||
endif # SERIAL
|
||||
|
||||
if I2C
|
||||
|
||||
config I2C_MCUX
|
||||
def_bool y
|
||||
|
||||
endif # I2C
|
||||
|
||||
if SPI
|
||||
|
||||
config SPI_MCUX
|
||||
def_bool y
|
||||
|
||||
endif # SPI
|
||||
|
||||
if FLASH
|
||||
|
||||
config SOC_FLASH_MCUX
|
||||
def_bool y
|
||||
|
||||
endif # FLASH
|
||||
|
||||
endif # SOC_MKL25Z
|
25
arch/arm/soc/nxp_kinetis/kl2x/Kconfig.defconfig.series
Normal file
25
arch/arm/soc/nxp_kinetis/kl2x/Kconfig.defconfig.series
Normal file
|
@ -0,0 +1,25 @@
|
|||
# Kconfig - Kinetis KL2x series configuration options
|
||||
#
|
||||
# Copyright (c) 2017, NXP
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
||||
if SOC_SERIES_KINETIS_KL2X
|
||||
|
||||
config SOC_SERIES
|
||||
default kl2x
|
||||
|
||||
if !HAS_DTS
|
||||
|
||||
config SRAM_BASE_ADDRESS
|
||||
default 0x1FFFF000
|
||||
|
||||
config FLASH_BASE_ADDRESS
|
||||
default 0x00000000
|
||||
|
||||
endif # !HAS_DTS
|
||||
|
||||
source "arch/arm/soc/nxp_kinetis/kl2x/Kconfig.defconfig.mk*"
|
||||
|
||||
endif # SOC_SERIES_KINETIS_KL2X
|
16
arch/arm/soc/nxp_kinetis/kl2x/Kconfig.series
Normal file
16
arch/arm/soc/nxp_kinetis/kl2x/Kconfig.series
Normal file
|
@ -0,0 +1,16 @@
|
|||
# Kconfig - Kinetis KL2x MCU series
|
||||
#
|
||||
# Copyright (c) 2017, NXP
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
||||
config SOC_SERIES_KINETIS_KL2X
|
||||
bool "Kinetis KL2x Series MCU"
|
||||
select CPU_CORTEX_M
|
||||
select CPU_CORTEX_M0PLUS
|
||||
select SOC_FAMILY_KINETIS
|
||||
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
|
||||
select CPU_HAS_SYSTICK
|
||||
help
|
||||
Enable support for Kinetis KL2x MCU series
|
78
arch/arm/soc/nxp_kinetis/kl2x/Kconfig.soc
Normal file
78
arch/arm/soc/nxp_kinetis/kl2x/Kconfig.soc
Normal file
|
@ -0,0 +1,78 @@
|
|||
# Kconfig - Kinetis KL2x MCU series
|
||||
#
|
||||
# Copyright (c) 2017, NXP
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
||||
choice
|
||||
prompt "Kinetis KL2x MCU Selection"
|
||||
depends on SOC_SERIES_KINETIS_KL2X
|
||||
|
||||
config SOC_MKL25Z4
|
||||
bool "SOC_MKL25Z4"
|
||||
select CPU_CORTEX_M0PLUS
|
||||
select HAS_MCUX
|
||||
select HAS_OSC
|
||||
select HAS_MCG
|
||||
|
||||
endchoice
|
||||
|
||||
if SOC_SERIES_KINETIS_KL2X
|
||||
|
||||
config SOC_PART_NUMBER_MKL25Z32VFM4
|
||||
bool
|
||||
|
||||
config SOC_PART_NUMBER_MKL25Z64VFM4
|
||||
bool
|
||||
|
||||
config SOC_PART_NUMBER_MKL25Z128VFM4
|
||||
bool
|
||||
|
||||
config SOC_PART_NUMBER_MKL25Z32VFT4
|
||||
bool
|
||||
|
||||
config SOC_PART_NUMBER_MKL25Z64VFT4
|
||||
bool
|
||||
|
||||
config SOC_PART_NUMBER_MKL25Z128VFT4
|
||||
bool
|
||||
|
||||
config SOC_PART_NUMBER_MKL25Z32VLH4
|
||||
bool
|
||||
|
||||
config SOC_PART_NUMBER_MKL25Z64VLH4
|
||||
bool
|
||||
|
||||
config SOC_PART_NUMBER_MKL25Z128VLH4
|
||||
bool
|
||||
|
||||
config SOC_PART_NUMBER_MKL25Z32VLK4
|
||||
bool
|
||||
|
||||
config SOC_PART_NUMBER_MKL25Z64VLK4
|
||||
bool
|
||||
|
||||
config SOC_PART_NUMBER_MKL25Z128VLK4
|
||||
bool
|
||||
|
||||
config SOC_PART_NUMBER_KINETIS_KL2X
|
||||
string
|
||||
default "MKL25Z32VFM4" if SOC_PART_NUMBER_MKL25Z32VFM4
|
||||
default "MKL25Z64VFM4" if SOC_PART_NUMBER_MKL25Z64VFM4
|
||||
default "MKL25Z128VFM4" if SOC_PART_NUMBER_MKL25Z128VFM4
|
||||
default "MKL25Z32VFT4" if SOC_PART_NUMBER_MKL25Z32VFT4
|
||||
default "MKL25Z64VFT4" if SOC_PART_NUMBER_MKL25Z64VFT4
|
||||
default "MKL25Z128VFT4" if SOC_PART_NUMBER_MKL25Z128VFT4
|
||||
default "MKL25Z32VLH4" if SOC_PART_NUMBER_MKL25Z32VLH4
|
||||
default "MKL25Z64VLH4" if SOC_PART_NUMBER_MKL25Z64VLH4
|
||||
default "MKL25Z128VLH4" if SOC_PART_NUMBER_MKL25Z128VLH4
|
||||
default "MKL25Z32VLK4" if SOC_PART_NUMBER_MKL25Z32VLK4
|
||||
default "MKL25Z64VLK4" if SOC_PART_NUMBER_MKL25Z64VLK4
|
||||
default "MKL25Z128VLK4" if SOC_PART_NUMBER_MKL25Z128VLK4
|
||||
help
|
||||
This string holds the full part number of the SoC. It is a hidden option
|
||||
that you should not set directly. The part number selection choice defines
|
||||
the default value for this string.
|
||||
|
||||
endif # SOC_SERIES_KINETIS_KL2X
|
8
arch/arm/soc/nxp_kinetis/kl2x/Makefile
Normal file
8
arch/arm/soc/nxp_kinetis/kl2x/Makefile
Normal file
|
@ -0,0 +1,8 @@
|
|||
# Makefile - Kinetis KL2x MCU series
|
||||
#
|
||||
# Copyright (c) 2017, NXP
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
||||
obj-y += soc.o
|
31
arch/arm/soc/nxp_kinetis/kl2x/linker.ld
Normal file
31
arch/arm/soc/nxp_kinetis/kl2x/linker.ld
Normal file
|
@ -0,0 +1,31 @@
|
|||
/*
|
||||
* Copyright (c) 2014 Wind River Systems, Inc.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file
|
||||
* @brief Linker command/script file
|
||||
*
|
||||
* This is the linker script for both standard images and XIP images.
|
||||
*/
|
||||
|
||||
#include <autoconf.h>
|
||||
|
||||
/*
|
||||
* KL25Z Flash configuration fields
|
||||
* These are 16 bytes, which must be loaded to address 0x400, and include
|
||||
* default protection and security settings.
|
||||
* They are loaded at reset to various Flash Memory module (FTFE) registers.
|
||||
*/
|
||||
|
||||
/*
|
||||
* No need to account for this when running a RAM-only image since that
|
||||
* security feature resides in ROM.
|
||||
*/
|
||||
#if defined(CONFIG_XIP)
|
||||
#define SKIP_TO_KINETIS_FLASH_CONFIG . = 0x400;
|
||||
#endif
|
||||
|
||||
#include <arch/arm/cortex_m/scripts/linker.ld>
|
127
arch/arm/soc/nxp_kinetis/kl2x/soc.c
Normal file
127
arch/arm/soc/nxp_kinetis/kl2x/soc.c
Normal file
|
@ -0,0 +1,127 @@
|
|||
/*
|
||||
* Copyright (c) 2017, NXP
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include <kernel.h>
|
||||
#include <device.h>
|
||||
#include <init.h>
|
||||
#include <soc.h>
|
||||
#include <sections.h>
|
||||
#include <fsl_common.h>
|
||||
#include <fsl_clock.h>
|
||||
#include <arch/cpu.h>
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables
|
||||
******************************************************************************/
|
||||
|
||||
/*
|
||||
* KL25Z Flash configuration fields
|
||||
* These 16 bytes, which must be loaded to address 0x400, include default
|
||||
* protection and security settings.
|
||||
* They are loaded at reset to various Flash Memory module (FTFE) registers.
|
||||
*
|
||||
* The structure is:
|
||||
* -Backdoor Comparison Key for unsecuring the MCU - 8 bytes
|
||||
* -Program flash protection bytes, 4 bytes, written to FPROT0-3
|
||||
* -Flash security byte, 1 byte, written to FSEC
|
||||
* -Flash nonvolatile option byte, 1 byte, written to FOPT
|
||||
* -Reserved, 1 byte, (Data flash protection byte for FlexNVM)
|
||||
* -Reserved, 1 byte, (EEPROM protection byte for FlexNVM)
|
||||
*
|
||||
*/
|
||||
uint8_t __kinetis_flash_config_section __kinetis_flash_config[] = {
|
||||
/* Backdoor Comparison Key (unused) */
|
||||
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
|
||||
/* Program flash protection; 1 bit/region - 0=protected, 1=unprotected
|
||||
*/
|
||||
0xFF, 0xFF, 0xFF, 0xFF,
|
||||
/*
|
||||
* Flash security: Backdoor key disabled, Mass erase enabled,
|
||||
* Factory access enabled, MCU is unsecure
|
||||
*/
|
||||
0xFE,
|
||||
/* Flash nonvolatile option: NMI enabled, EzPort enabled, Normal boot */
|
||||
0xFF,
|
||||
/* Reserved for FlexNVM feature (unsupported by this MCU) */
|
||||
0xFF, 0xFF};
|
||||
|
||||
static ALWAYS_INLINE void clkInit(void)
|
||||
{
|
||||
/*
|
||||
* Core clock: 48MHz
|
||||
* Bus clock: 24MHz
|
||||
*/
|
||||
const mcg_pll_config_t pll0Config = {
|
||||
.enableMode = 0U, .prdiv = CONFIG_MCG_PRDIV0, .vdiv = CONFIG_MCG_VDIV0,
|
||||
};
|
||||
const sim_clock_config_t simConfig = {
|
||||
.pllFllSel = 1U, /* PLLFLLSEL select PLL. */
|
||||
.er32kSrc = 3U, /* ERCLK32K selection, use LPO. */
|
||||
.clkdiv1 = 0x10010000U, /* SIM_CLKDIV1. */
|
||||
};
|
||||
|
||||
const osc_config_t oscConfig = {.freq = CONFIG_OSC_XTAL0_FREQ,
|
||||
.capLoad = 0,
|
||||
#if defined(CONFIG_OSC_EXTERNAL)
|
||||
.workMode = kOSC_ModeExt,
|
||||
#elif defined(CONFIG_OSC_LOW_POWER)
|
||||
.workMode = kOSC_ModeOscLowPower,
|
||||
#elif defined(CONFIG_OSC_HIGH_GAIN)
|
||||
.workMode = kOSC_ModeOscHighGain,
|
||||
#else
|
||||
#error "An oscillator mode must be defined"
|
||||
#endif
|
||||
.oscerConfig = {
|
||||
.enableMode = kOSC_ErClkEnable,
|
||||
#if (defined(FSL_FEATURE_OSC_HAS_EXT_REF_CLOCK_DIVIDER) && \
|
||||
FSL_FEATURE_OSC_HAS_EXT_REF_CLOCK_DIVIDER)
|
||||
.erclkDiv = 0U,
|
||||
#endif
|
||||
} };
|
||||
|
||||
CLOCK_SetSimSafeDivs();
|
||||
CLOCK_InitOsc0(&oscConfig);
|
||||
|
||||
/* Passing the XTAL0 frequency to clock driver. */
|
||||
CLOCK_SetXtal0Freq(CONFIG_OSC_XTAL0_FREQ);
|
||||
|
||||
CLOCK_BootToPeeMode(kMCG_OscselOsc, kMCG_PllClkSelPll0, &pll0Config);
|
||||
|
||||
CLOCK_SetInternalRefClkConfig(kMCG_IrclkEnable, kMCG_IrcSlow, 0);
|
||||
CLOCK_SetSimConfig(&simConfig);
|
||||
|
||||
#ifdef CONFIG_UART_MCUX_0
|
||||
CLOCK_SetLpsci0Clock(1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static int kl2x_init(struct device *arg)
|
||||
{
|
||||
ARG_UNUSED(arg);
|
||||
|
||||
int oldLevel; /* old interrupt lock level */
|
||||
|
||||
/* disable interrupts */
|
||||
oldLevel = irq_lock();
|
||||
|
||||
/* Disable the watchdog */
|
||||
SIM->COPC = 0;
|
||||
|
||||
/* Initialize system clock to 48 MHz */
|
||||
clkInit();
|
||||
|
||||
/*
|
||||
* install default handler that simply resets the CPU
|
||||
* if configured in the kernel, NOP otherwise
|
||||
*/
|
||||
NMI_INIT();
|
||||
|
||||
/* restore interrupt state */
|
||||
irq_unlock(oldLevel);
|
||||
return 0;
|
||||
}
|
||||
|
||||
SYS_INIT(kl2x_init, PRE_KERNEL_1, 0);
|
65
arch/arm/soc/nxp_kinetis/kl2x/soc.h
Normal file
65
arch/arm/soc/nxp_kinetis/kl2x/soc.h
Normal file
|
@ -0,0 +1,65 @@
|
|||
/*
|
||||
* Copyright (c) 2017, NXP
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef _SOC__H_
|
||||
#define _SOC__H_
|
||||
|
||||
#include <misc/util.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define UART0_CLK_SRC kCLOCK_CoreSysClk
|
||||
|
||||
/* IRQs */
|
||||
#define IRQ_DMA_CHAN0 0
|
||||
#define IRQ_DMA_CHAN1 1
|
||||
#define IRQ_DMA_CHAN2 2
|
||||
#define IRQ_DMA_CHAN3 3
|
||||
#define IRQ_RESERVED0 4
|
||||
#define IRQ_FTFA 5
|
||||
#define IRQ_LOW_VOLTAGE 6
|
||||
#define IRQ_LOW_LEAKAGE 7
|
||||
#define IRQ_I2C0 8
|
||||
#define IRQ_I2C1 9
|
||||
#define IRQ_SPI0 10
|
||||
#define IRQ_SPI1 11
|
||||
#define IRQ_UART0 12
|
||||
#define IRQ_UART0_STATUS 12
|
||||
#define IRQ_UART1 13
|
||||
#define IRQ_UART2 14
|
||||
#define IRQ_ADC0 15
|
||||
#define IRQ_CMP0 16
|
||||
#define IRQ_TPM0 17
|
||||
#define IRQ_TPM1 18
|
||||
#define IRQ_TPM2 19
|
||||
#define IRQ_RTC_ALARM 20
|
||||
#define IRQ_RTC_SEC 21
|
||||
#define IRQ_PIT 22
|
||||
#define IRQ_RESERVED39 23
|
||||
#define IRQ_USB0 24
|
||||
#define IRQ_DAC0 25
|
||||
#define IRQ_TSI 26
|
||||
#define IRQ_MCG 27
|
||||
#define IRQ_LPTMR0 28
|
||||
#define IRQ_RESERVED45 29
|
||||
#define IRQ_GPIO_PORTA 30
|
||||
#define IRQ_GPIO_PORTD 31
|
||||
|
||||
#ifndef _ASMLANGUAGE
|
||||
|
||||
#include <device.h>
|
||||
#include <misc/util.h>
|
||||
#include <drivers/rand32.h>
|
||||
|
||||
#endif /* !_ASMLANGUAGE */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _SOC__H_ */
|
Loading…
Add table
Add a link
Reference in a new issue