drivers: ethernet: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h DT_INST macro APIs. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
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parent
66fd31959c
commit
329dbefb37
6 changed files with 39 additions and 29 deletions
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@ -4,6 +4,8 @@
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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#define DT_DRV_COMPAT intel_e1000
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#define LOG_MODULE_NAME eth_e1000
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#define LOG_MODULE_NAME eth_e1000
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#define LOG_LEVEL CONFIG_ETHERNET_LOG_LEVEL
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#define LOG_LEVEL CONFIG_ETHERNET_LOG_LEVEL
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#include <logging/log.h>
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#include <logging/log.h>
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@ -225,12 +227,12 @@ static void e1000_init(struct net_if *iface)
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net_if_set_link_addr(iface, dev->mac, sizeof(dev->mac),
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net_if_set_link_addr(iface, dev->mac, sizeof(dev->mac),
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NET_LINK_ETHERNET);
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NET_LINK_ETHERNET);
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IRQ_CONNECT(DT_INST_0_INTEL_E1000_IRQ_0,
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IRQ_CONNECT(DT_INST_IRQN(0),
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DT_INST_0_INTEL_E1000_IRQ_0_PRIORITY,
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DT_INST_IRQ(0, priority),
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e1000_isr, DEVICE_GET(eth_e1000),
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e1000_isr, DEVICE_GET(eth_e1000),
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DT_INST_0_INTEL_E1000_IRQ_0_SENSE);
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DT_INST_IRQ(0, sense));
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irq_enable(DT_INST_0_INTEL_E1000_IRQ_0);
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irq_enable(DT_INST_IRQN(0));
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iow32(dev, CTRL, CTRL_SLU); /* Set link up */
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iow32(dev, CTRL, CTRL_SLU); /* Set link up */
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@ -5,6 +5,8 @@
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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#define DT_DRV_COMPAT microchip_enc28j60
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#define LOG_MODULE_NAME eth_enc28j60
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#define LOG_MODULE_NAME eth_enc28j60
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#define LOG_LEVEL CONFIG_ETHERNET_LOG_LEVEL
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#define LOG_LEVEL CONFIG_ETHERNET_LOG_LEVEL
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@ -807,7 +809,7 @@ static int eth_enc28j60_init(struct device *dev)
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#ifdef CONFIG_ETH_ENC28J60_0
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#ifdef CONFIG_ETH_ENC28J60_0
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static struct eth_enc28j60_runtime eth_enc28j60_0_runtime = {
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static struct eth_enc28j60_runtime eth_enc28j60_0_runtime = {
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.mac_address = DT_INST_0_MICROCHIP_ENC28J60_LOCAL_MAC_ADDRESS,
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.mac_address = DT_INST_PROP(0, local_mac_address),
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.tx_rx_sem = Z_SEM_INITIALIZER(eth_enc28j60_0_runtime.tx_rx_sem,
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.tx_rx_sem = Z_SEM_INITIALIZER(eth_enc28j60_0_runtime.tx_rx_sem,
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1, UINT_MAX),
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1, UINT_MAX),
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.int_sem = Z_SEM_INITIALIZER(eth_enc28j60_0_runtime.int_sem,
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.int_sem = Z_SEM_INITIALIZER(eth_enc28j60_0_runtime.int_sem,
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@ -815,21 +817,21 @@ static struct eth_enc28j60_runtime eth_enc28j60_0_runtime = {
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};
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};
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static const struct eth_enc28j60_config eth_enc28j60_0_config = {
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static const struct eth_enc28j60_config eth_enc28j60_0_config = {
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.gpio_port = DT_INST_0_MICROCHIP_ENC28J60_INT_GPIOS_CONTROLLER,
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.gpio_port = DT_INST_GPIO_LABEL(0, int_gpios),
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.gpio_pin = DT_INST_0_MICROCHIP_ENC28J60_INT_GPIOS_PIN,
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.gpio_pin = DT_INST_GPIO_PIN(0, int_gpios),
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.gpio_flags = DT_INST_0_MICROCHIP_ENC28J60_INT_GPIOS_FLAGS,
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.gpio_flags = DT_INST_GPIO_FLAGS(0, int_gpios),
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.spi_port = DT_INST_0_MICROCHIP_ENC28J60_BUS_NAME,
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.spi_port = DT_INST_BUS_LABEL(0),
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.spi_freq = DT_INST_0_MICROCHIP_ENC28J60_SPI_MAX_FREQUENCY,
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.spi_freq = DT_INST_PROP(0, spi_max_frequency),
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.spi_slave = DT_INST_0_MICROCHIP_ENC28J60_BASE_ADDRESS,
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.spi_slave = DT_INST_REG_ADDR(0),
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#ifdef CONFIG_ETH_ENC28J60_0_GPIO_SPI_CS
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#ifdef CONFIG_ETH_ENC28J60_0_GPIO_SPI_CS
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.spi_cs_port = DT_INST_0_MICROCHIP_ENC28J60_CS_GPIOS_CONTROLLER,
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.spi_cs_port = DT_INST_SPI_DEV_CS_GPIOS_LABEL(0),
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.spi_cs_pin = DT_INST_0_MICROCHIP_ENC28J60_CS_GPIOS_PIN,
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.spi_cs_pin = DT_INST_SPI_DEV_CS_GPIOS_PIN(0),
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#endif /* CONFIG_ETH_ENC28J60_0_GPIO_SPI_CS */
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#endif /* CONFIG_ETH_ENC28J60_0_GPIO_SPI_CS */
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.full_duplex = IS_ENABLED(CONFIG_ETH_ENC28J60_0_FULL_DUPLEX),
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.full_duplex = IS_ENABLED(CONFIG_ETH_ENC28J60_0_FULL_DUPLEX),
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.timeout = CONFIG_ETH_ENC28J60_TIMEOUT,
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.timeout = CONFIG_ETH_ENC28J60_TIMEOUT,
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};
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};
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ETH_NET_DEVICE_INIT(enc28j60_0, DT_INST_0_MICROCHIP_ENC28J60_LABEL,
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ETH_NET_DEVICE_INIT(enc28j60_0, DT_INST_LABEL(0),
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eth_enc28j60_init, device_pm_control_nop,
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eth_enc28j60_init, device_pm_control_nop,
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ð_enc28j60_0_runtime, ð_enc28j60_0_config,
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ð_enc28j60_0_runtime, ð_enc28j60_0_config,
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CONFIG_ETH_INIT_PRIORITY, &api_funcs, NET_ETH_MTU);
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CONFIG_ETH_INIT_PRIORITY, &api_funcs, NET_ETH_MTU);
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@ -6,6 +6,8 @@
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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#define DT_DRV_COMPAT microchip_enc424j600
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#include <zephyr.h>
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#include <zephyr.h>
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#include <device.h>
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#include <device.h>
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#include <string.h>
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#include <string.h>
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@ -752,20 +754,20 @@ static struct enc424j600_runtime enc424j600_0_runtime = {
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};
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};
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static const struct enc424j600_config enc424j600_0_config = {
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static const struct enc424j600_config enc424j600_0_config = {
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.gpio_port = DT_INST_0_MICROCHIP_ENC424J600_INT_GPIOS_CONTROLLER,
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.gpio_port = DT_INST_GPIO_LABEL(0, int_gpios),
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.gpio_pin = DT_INST_0_MICROCHIP_ENC424J600_INT_GPIOS_PIN,
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.gpio_pin = DT_INST_GPIO_PIN(0, int_gpios),
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.gpio_flags = DT_INST_0_MICROCHIP_ENC424J600_INT_GPIOS_FLAGS,
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.gpio_flags = DT_INST_GPIO_FLAGS(0, int_gpios),
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.spi_port = DT_INST_0_MICROCHIP_ENC424J600_BUS_NAME,
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.spi_port = DT_INST_BUS_LABEL(0),
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.spi_freq = DT_INST_0_MICROCHIP_ENC424J600_SPI_MAX_FREQUENCY,
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.spi_freq = DT_INST_PROP(0, spi_max_frequency),
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.spi_slave = DT_INST_0_MICROCHIP_ENC424J600_BASE_ADDRESS,
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.spi_slave = DT_INST_REG_ADDR(0),
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#ifdef CONFIG_ETH_ENC424J600_0_GPIO_SPI_CS
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#ifdef CONFIG_ETH_ENC424J600_0_GPIO_SPI_CS
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.spi_cs_port = DT_INST_0_MICROCHIP_ENC424J600_CS_GPIOS_CONTROLLER,
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.spi_cs_port = DT_INST_SPI_DEV_CS_GPIOS_LABEL(0),
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.spi_cs_pin = DT_INST_0_MICROCHIP_ENC424J600_CS_GPIOS_PIN,
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.spi_cs_pin = DT_INST_SPI_DEV_CS_GPIOS_PIN(0),
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#endif /* CONFIG_ETH_ENC424J600_0_GPIO_SPI_CS */
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#endif /* CONFIG_ETH_ENC424J600_0_GPIO_SPI_CS */
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.timeout = CONFIG_ETH_ENC424J600_TIMEOUT,
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.timeout = CONFIG_ETH_ENC424J600_TIMEOUT,
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};
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};
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ETH_NET_DEVICE_INIT(enc424j600_0, DT_INST_0_MICROCHIP_ENC424J600_LABEL,
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ETH_NET_DEVICE_INIT(enc424j600_0, DT_INST_LABEL(0),
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enc424j600_init, device_pm_control_nop,
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enc424j600_init, device_pm_control_nop,
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&enc424j600_0_runtime, &enc424j600_0_config,
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&enc424j600_0_runtime, &enc424j600_0_config,
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CONFIG_ETH_INIT_PRIORITY, &api_funcs, NET_ETH_MTU);
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CONFIG_ETH_INIT_PRIORITY, &api_funcs, NET_ETH_MTU);
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@ -7,6 +7,8 @@
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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#define DT_DRV_COMPAT nxp_kinetis_ethernet
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/* Driver Limitations:
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/* Driver Limitations:
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*
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*
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* There is no statistics collection for either normal operation or
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* There is no statistics collection for either normal operation or
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@ -1198,7 +1200,7 @@ static void eth_0_config_func(void);
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static struct eth_context eth_0_context = {
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static struct eth_context eth_0_context = {
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.base = ENET,
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.base = ENET,
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#if defined(CONFIG_NET_POWER_MANAGEMENT)
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#if defined(CONFIG_NET_POWER_MANAGEMENT)
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.clock_name = DT_INST_0_NXP_KINETIS_ETHERNET_CLOCK_CONTROLLER,
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.clock_name = DT_INST_CLOCKS_LABEL(0),
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.clock = kCLOCK_Enet0,
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.clock = kCLOCK_Enet0,
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#endif
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#endif
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.config_func = eth_0_config_func,
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.config_func = eth_0_config_func,
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@ -1260,7 +1262,7 @@ static void eth_1_config_func(void);
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static struct eth_context eth_1_context = {
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static struct eth_context eth_1_context = {
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.base = ENET2,
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.base = ENET2,
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#if defined(CONFIG_NET_POWER_MANAGEMENT)
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#if defined(CONFIG_NET_POWER_MANAGEMENT)
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.clock_name = DT_INST_1_NXP_KINETIS_ETHERNET_CLOCK_CONTROLLER,
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.clock_name = DT_INST_CLOCKS_LABEL(1),
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.clock = kCLOCK_Enet2,
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.clock = kCLOCK_Enet2,
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#endif
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#endif
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.config_func = eth_1_config_func,
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.config_func = eth_1_config_func,
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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#define DT_DRV_COMPAT smsc_lan9220
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/* SMSC911x/SMSC9220 driver. Partly based on mbedOS driver. */
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/* SMSC911x/SMSC9220 driver. Partly based on mbedOS driver. */
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#define LOG_MODULE_NAME eth_smsc911x
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#define LOG_MODULE_NAME eth_smsc911x
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int eth_init(struct device *dev)
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int eth_init(struct device *dev)
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{
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{
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IRQ_CONNECT(DT_INST_0_SMSC_LAN9220_IRQ_0,
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IRQ_CONNECT(DT_INST_IRQN(0),
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DT_INST_0_SMSC_LAN9220_IRQ_0_PRIORITY,
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DT_INST_IRQ(0, priority),
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eth_smsc911x_isr, DEVICE_GET(eth_smsc911x_0), 0);
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eth_smsc911x_isr, DEVICE_GET(eth_smsc911x_0), 0);
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int ret = smsc_init();
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int ret = smsc_init();
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@ -670,7 +672,7 @@ int eth_init(struct device *dev)
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return -ENODEV;
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return -ENODEV;
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}
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}
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irq_enable(DT_INST_0_SMSC_LAN9220_IRQ_0);
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irq_enable(DT_INST_IRQN(0));
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return ret;
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return ret;
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}
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}
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@ -176,7 +176,7 @@ __IO uint32_t E2P_DATA;
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#define SMSC9220_PHY_CS 31
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#define SMSC9220_PHY_CS 31
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#ifndef SMSC9220_BASE
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#ifndef SMSC9220_BASE
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#define SMSC9220_BASE DT_INST_0_SMSC_LAN9220_BASE_ADDRESS
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#define SMSC9220_BASE DT_INST_REG_ADDR(0)
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#endif
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#endif
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#define SMSC9220 ((volatile SMSC9220_TypeDef *)SMSC9220_BASE)
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#define SMSC9220 ((volatile SMSC9220_TypeDef *)SMSC9220_BASE)
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