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soc: espressif: esp32s2: simple boot support

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Add simplistic booting method which allows to run
applications without the 2nd stage bootloader.

- introduce memory layout header file
- update and optimize default and mcuboot linker scripts
- remove building multiple binaries during the application build

Signed-off-by: Marek Matej <marek.matej@espressif.com>
This commit is contained in:
Marek Matej 2024-01-31 20:24:46 +01:00 • committed by Anas Nashif
commit 323f811c7c
5 changed files with 964 additions and 617 deletions
Download patch file Download diff file Expand all files Collapse all files

75
soc/espressif/esp32s2/CMakeLists.txt
View file

@ -13,57 +13,60 @@ zephyr_library_sources_ifdef(CONFIG_NEWLIB_LIBC newlib_fix.c)
zephyr_library_sources_ifdef(CONFIG_PM power.c) zephyr_library_sources_ifdef(CONFIG_PM power.c)
zephyr_library_sources_ifdef(CONFIG_POWEROFF poweroff.c) zephyr_library_sources_ifdef(CONFIG_POWEROFF poweroff.c)
# get code-partition slot0 address
dt_nodelabel(dts_partition_path NODELABEL "slot0_partition")
dt_reg_addr(img_0_off PATH ${dts_partition_path})
# get code-partition boot address
dt_nodelabel(dts_partition_path NODELABEL "boot_partition")
dt_reg_addr(boot_off PATH ${dts_partition_path})
# get flash size to use in esptool as string # get flash size to use in esptool as string
math(EXPR esptoolpy_flashsize "${CONFIG_FLASH_SIZE} / 0x100000") math(EXPR esptoolpy_flashsize "${CONFIG_FLASH_SIZE} / 0x100000")
if(CONFIG_BOOTLOADER_ESP_IDF) if(NOT CONFIG_BOOTLOADER_MCUBOOT)
set(bootloader_dir "${ZEPHYR_HAL_ESPRESSIF_MODULE_DIR}/zephyr/blobs/lib/${CONFIG_SOC_SERIES}")
if(EXISTS "${bootloader_dir}/bootloader-${CONFIG_SOC_SERIES}.bin")
file(COPY "${bootloader_dir}/bootloader-${CONFIG_SOC_SERIES}.bin" DESTINATION ${CMAKE_BINARY_DIR})
file(RENAME "${CMAKE_BINARY_DIR}/bootloader-${CONFIG_SOC_SERIES}.bin" "${CMAKE_BINARY_DIR}/bootloader.bin")
endif()
if(EXISTS "${bootloader_dir}/partition-table-${CONFIG_SOC_SERIES}.bin")
file(COPY "${bootloader_dir}/partition-table-${CONFIG_SOC_SERIES}.bin" DESTINATION ${CMAKE_BINARY_DIR})
file(RENAME "${CMAKE_BINARY_DIR}/partition-table-${CONFIG_SOC_SERIES}.bin" "${CMAKE_BINARY_DIR}/partition-table.bin")
endif()
board_finalize_runner_args(esp32 "--esp-flash-bootloader=${CMAKE_BINARY_DIR}/bootloader.bin")
board_finalize_runner_args(esp32 "--esp-flash-partition_table=${CMAKE_BINARY_DIR}/partition-table.bin")
board_finalize_runner_args(esp32 "--esp-partition-table-address=0x8000")
endif()
if(CONFIG_MCUBOOT OR CONFIG_BOOTLOADER_ESP_IDF)
if(CONFIG_BUILD_OUTPUT_BIN) if(CONFIG_BUILD_OUTPUT_BIN)
# make ESP ROM loader compatible image
message("ESP-IDF path: ${ESP_IDF_PATH}")
set(ESPTOOL_PY ${ESP_IDF_PATH}/tools/esptool_py/esptool.py)
message("esptool path: ${ESPTOOL_PY}")
set(ELF2IMAGE_ARG "")
if(NOT CONFIG_MCUBOOT)
set(ELF2IMAGE_ARG "--ram-only-header")
endif()
set_property(GLOBAL APPEND PROPERTY extra_post_build_commands set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
COMMAND ${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/tools/esptool_py/esptool.py COMMAND ${PYTHON_EXECUTABLE} ${ESPTOOL_PY}
ARGS --chip esp32s2 elf2image --flash_mode dio --flash_freq 40m --flash_size ${esptoolpy_flashsize}MB ARGS --chip esp32s2 elf2image ${ELF2IMAGE_ARG}
--flash_mode dio --flash_freq 40m
--flash_size ${esptoolpy_flashsize}MB
-o ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.bin -o ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.bin
${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf) ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf)
endif() endif()
if(CONFIG_MCUBOOT)
board_finalize_runner_args(esp32 "--esp-flash-bootloader=${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.bin")
endif() endif()
endif() # Get code-partition boot address
dt_nodelabel(dts_partition_path NODELABEL "boot_partition")
dt_reg_addr(boot_off PATH ${dts_partition_path})
board_finalize_runner_args(esp32 "--esp-boot-address=${boot_off}") # Get code-partition slot0 address
dt_nodelabel(dts_partition_path NODELABEL "slot0_partition")
dt_reg_addr(img_0_off PATH ${dts_partition_path})
if(CONFIG_ESP_SIMPLE_BOOT)
board_finalize_runner_args(esp32 "--esp-app-address=${boot_off}")
else()
board_finalize_runner_args(esp32 "--esp-app-address=${img_0_off}") board_finalize_runner_args(esp32 "--esp-app-address=${img_0_off}")
endif()
if(CONFIG_MCUBOOT)
# search from cross references between bootloader sections
message("check_callgraph using: ${ESP_IDF_PATH}/tools/ci/check_callgraph.py")
set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
COMMAND
${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/tools/ci/check_callgraph.py
ARGS
--rtl-dirs ${CMAKE_BINARY_DIR}/zephyr
--elf-file ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf
find-refs --from-section=.iram0.iram_loader --to-section=.iram0.text
--exit-code)
endif()
if(CONFIG_MCUBOOT) if(CONFIG_MCUBOOT)
set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/mcuboot.ld CACHE INTERNAL "") set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/mcuboot.ld CACHE INTERNAL "")

1027
soc/espressif/esp32s2/default.ld
View file

File diff suppressed because it is too large Load diff

373
soc/espressif/esp32s2/mcuboot.ld
View file

@ -1,68 +1,187 @@
/* /*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
/**
* @file
* @brief Linker command/script file
*
* Linker script for the MCUboot on Xtensa platform.
*/
#include <zephyr/devicetree.h> #include <zephyr/devicetree.h>
#include <zephyr/linker/sections.h> #include <zephyr/linker/sections.h>
#include <zephyr/linker/linker-defs.h> #include <zephyr/linker/linker-defs.h>
#include <zephyr/linker/linker-tool.h> #include <zephyr/linker/linker-tool.h>
#include "memory.h"
#ifdef CONFIG_XIP #ifdef CONFIG_XIP
#error "Xtensa bootloader cannot use XIP" #error "Xtensa bootloader cannot use XIP"
#endif /* CONFIG_XIP */ #endif
/* Disable all romable LMA */ /* Disable all romable LMA */
#udef GROUP_DATA_LINK_IN #undef GROUP_DATA_LINK_IN
#define GROUP_DATA_LINK_IN(vregion, lregion) > vregion #define GROUP_DATA_LINK_IN(vregion, lregion) > vregion
/* Aliases for zephyr scripts */
#define RAMABLE_REGION dram_seg #define RAMABLE_REGION dram_seg
#define RAMABLE_REGION_1 dram_seg
#define RODATA_REGION dram_seg #define RODATA_REGION dram_seg
#define ROMABLE_REGION dram_seg #define ROMABLE_REGION dram_seg
#define IRAM_REGION iram_seg
#define FLASH_CODE_REGION iram_seg
#define IROM_SEG_ALIGN 16
MEMORY MEMORY
{ {
iram_seg (RWX) : org = 0x40040000, len = 0x7000 iram_seg (RWX) : org = BOOTLOADER_IRAM_SEG_START,
iram_loader_seg (RWX) : org = 0x40047000, len = 0x3000 len = BOOTLOADER_IRAM_SEG_LEN
dram_seg (RW) : org = 0x3FFE6000, len = 0x6000 iram_loader_seg (RWX) : org = BOOTLOADER_IRAM_LOADER_SEG_START,
len = BOOTLOADER_IRAM_LOADER_SEG_LEN
dram_seg (RW) : org = BOOTLOADER_DRAM_SEG_START,
len = BOOTLOADER_DRAM_SEG_LEN
#ifdef CONFIG_GEN_ISR_TABLES #ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000 IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000
#endif #endif
} }
/* Default entry point: */
ENTRY(CONFIG_KERNEL_ENTRY) ENTRY(CONFIG_KERNEL_ENTRY)
SECTIONS SECTIONS
{ {
/* NOTE: .rodata section should be the first section in the linker script and no .iram0.loader_text :
* other section should appear before .rodata section. This is the requirement
* to align ROM section to 64K page offset.
* Adding .rodata as first section helps to reduce size of generated binary by
* few kBs.
*/
SECTION_PROLOGUE(_RODATA_SECTION_NAME,,)
{ {
__rodata_region_start = ABSOLUTE(.); _loader_text_start = ABSOLUTE(.);
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*libarch__xtensa__core.a:xtensa_asm2_util.*(.literal .text .literal.* .text.*)
*liblib__libc__common.a:abort.*(.literal .text .literal.* .text.*)
*libdrivers__timer.a:xtensa_sys_timer.*(.literal .text .literal.* .text.*)
*libarch__common.a:dynamic_isr.*(.literal .text .literal.* .text.*)
*libarch__common.a:sw_isr_common.*(.literal .text .literal.* .text.*)
*libapp.a:flash_map_extended.*(.literal .text .literal.* .text.*)
*libzephyr.a:printk.*(.literal.printk .literal.vprintk .literal.char_out .text.printk .text.vprintk .text.char_out)
*libzephyr.a:cbprintf_nano.*(.literal .text .literal.* .text.*)
*libzephyr.a:cpu.*(.literal .text .literal.* .text.*)
*libzephyr.a:mmu_hal.*(.literal .text .literal.* .text.*)
*libzephyr.a:cache_hal.*(.literal .text .literal.* .text.*)
*libzephyr.a:flash_map.*(.literal .text .literal.* .text.*)
*libzephyr.a:esp_rom_spiflash.*(.literal .text .literal.* .text.*)
*libzephyr.a:heap.*(.literal .text .literal.* .text.*)
*libkernel.a:kheap.*(.literal .text .literal.* .text.*)
*libkernel.a:mempool.*(.literal .text .literal.* .text.*)
*libkernel.a:device.*(.literal .text .literal.* .text.*)
*libkernel.a:timeout.*(.literal .text .literal.* .text.*)
*(.literal.bootloader_mmap .text.bootloader_mmap)
*(.literal.bootloader_munmap .text.bootloader_munmap)
*libzephyr.a:esp_loader.*(.literal .text .literal.* .text.*)
*libzephyr.a:mmu_hal.*(.literal .text .literal.* .text.*)
*(.literal.esp_intr_disable .literal.esp_intr_disable.* .text.esp_intr_disable .text.esp_intr_disable.*)
*(.literal.default_intr_handler .text.default_intr_handler .iram1.*.default_intr_handler)
*(.literal.esp_log_timestamp .text.esp_log_timestamp)
*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
*(.literal.esp_system_abort .text.esp_system_abort)
*(.fini.literal)
*(.fini)
*(.gnu.version)
/* CPU will try to prefetch up to 16 bytes of
* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
* safe access to up to 16 bytes after the last real instruction, add
* dummy bytes to ensure this
*/
. += 16;
_text_end = ABSOLUTE(.);
_etext = .;
. = ALIGN(4); . = ALIGN(4);
_loader_text_end = ABSOLUTE(.);
_iram_text_end = ABSOLUTE(.);
_iram_end = ABSOLUTE(.);
} > iram_loader_seg
.iram0.vectors : ALIGN(4)
{
_iram_start = ABSOLUTE(.);
/* Vectors go to IRAM */
_init_start = ABSOLUTE(.);
/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
. = 0x0;
KEEP(*(.WindowVectors.text));
. = 0x180;
KEEP(*(.Level2InterruptVector.text));
. = 0x1c0;
KEEP(*(.Level3InterruptVector.text));
. = 0x200;
KEEP(*(.Level4InterruptVector.text));
. = 0x240;
KEEP(*(.Level5InterruptVector.text));
. = 0x280;
KEEP(*(.DebugExceptionVector.text));
. = 0x2c0;
KEEP(*(.NMIExceptionVector.text));
. = 0x300;
KEEP(*(.KernelExceptionVector.text));
. = 0x340;
KEEP(*(.UserExceptionVector.text));
. = 0x3C0;
KEEP(*(.DoubleExceptionVector.text));
. = 0x400;
_invalid_pc_placeholder = ABSOLUTE(.);
*(.*Vector.literal)
*(.UserEnter.literal);
*(.UserEnter.text);
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
. = ALIGN (4);
_init_end = ABSOLUTE(.);
_iram_start = ABSOLUTE(.);
} > iram_seg
.iram0.text :
{
. = ALIGN(4);
*(.iram1 .iram1.*)
*(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
*(.literal .text .literal.* .text.*)
. = ALIGN(4);
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
. = ALIGN(4);
} > iram_seg
.dram0.data : ALIGN(16)
{
. = ALIGN(4);
__data_start = ABSOLUTE(.);
#include <snippets-rodata.ld> #include <snippets-rodata.ld>
. = ALIGN(4);
#include <snippets-rwdata.ld>
. = ALIGN(4);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*libzephyr.a:mmu_hal.*(.rodata .rodata.*)
*libzephyr.a:rtc_clk.*(.rodata .rodata.*)
KEEP(*(.jcr))
*(.dram1 .dram1.*)
. = ALIGN(4); . = ALIGN(4);
*(.rodata) *(.rodata)
*(.rodata.*) *(.rodata.*)
@ -97,52 +216,17 @@ SECTIONS
*(.gnu.linkonce.lit4.*) *(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.); _lit4_end = ABSOLUTE(.);
. = ALIGN(4); . = ALIGN(4);
_thread_local_start = ABSOLUTE(.);
*(.tdata)
*(.tdata.*)
*(.tbss)
*(.tbss.*)
*(.rodata_wlog) *(.rodata_wlog)
*(.rodata_wlog*) *(.rodata_wlog*)
_thread_local_end = ABSOLUTE(.); _thread_local_end = ABSOLUTE(.);
. = ALIGN(4); . = ALIGN(4);
} GROUP_DATA_LINK_IN(RODATA_REGION, ROMABLE_REGION) } > dram_seg
#include <zephyr/linker/common-rom/common-rom-cpp.ld>
#include <zephyr/linker/common-rom/common-rom-kernel-devices.ld> #include <zephyr/linker/common-rom/common-rom-kernel-devices.ld>
#include <zephyr/linker/common-rom/common-rom-ztest.ld>
#include <zephyr/linker/common-rom/common-rom-net.ld>
#include <zephyr/linker/common-rom/common-rom-bt.ld>
#include <zephyr/linker/common-rom/common-rom-debug.ld> #include <zephyr/linker/common-rom/common-rom-debug.ld>
#include <zephyr/linker/common-rom/common-rom-misc.ld> #include <zephyr/linker/common-rom/common-rom-misc.ld>
#include <snippets-sections.ld> #include <snippets-sections.ld>
.dram0.data :
{
__data_start = ABSOLUTE(.);
_btdm_data_start = ABSOLUTE(.);
*libbtdm_app.a:(.data .data.*)
. = ALIGN (4);
_btdm_data_end = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*libzephyr.a:mmu_hal.*(.rodata .rodata.*)
*libzephyr.a:rtc_clk.*(.rodata .rodata.*)
KEEP(*(.jcr))
*(.dram1 .dram1.*)
. = ALIGN(4);
} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
#include <zephyr/linker/cplusplus-rom.ld> #include <zephyr/linker/cplusplus-rom.ld>
#include <snippets-data-sections.ld> #include <snippets-data-sections.ld>
#include <zephyr/linker/common-ram.ld> #include <zephyr/linker/common-ram.ld>
@ -150,132 +234,21 @@ SECTIONS
#include <zephyr/linker/cplusplus-ram.ld> #include <zephyr/linker/cplusplus-ram.ld>
#include <zephyr/linker/common-rom/common-rom-logging.ld> #include <zephyr/linker/common-rom/common-rom-logging.ld>
.dram0.end : .noinit (NOLOAD):
{ {
. = ALIGN(4); . = ALIGN(8);
#include <snippets-rwdata.ld> *(.noinit)
. = ALIGN(4); *(.noinit.*)
_end = ABSOLUTE(.); . = ALIGN(8) ;
__data_end = ABSOLUTE(.); } > dram_seg
} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
/* Send .iram0 code to iram */
.iram0.vectors : ALIGN(4)
{
/* Vectors go to IRAM */
_init_start = ABSOLUTE(.);
/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
. = 0x0;
KEEP(*(.WindowVectors.text));
. = 0x180;
KEEP(*(.Level2InterruptVector.text));
. = 0x1c0;
KEEP(*(.Level3InterruptVector.text));
. = 0x200;
KEEP(*(.Level4InterruptVector.text));
. = 0x240;
KEEP(*(.Level5InterruptVector.text));
. = 0x280;
KEEP(*(.DebugExceptionVector.text));
. = 0x2c0;
KEEP(*(.NMIExceptionVector.text));
. = 0x300;
KEEP(*(.KernelExceptionVector.text));
. = 0x340;
KEEP(*(.UserExceptionVector.text));
. = 0x3C0;
KEEP(*(.DoubleExceptionVector.text));
. = 0x400;
*(.*Vector.literal)
*(.UserEnter.literal);
*(.UserEnter.text);
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
_init_end = ABSOLUTE(.);
/* This goes here, not at top of linker script, so addr2line finds it last,
and uses it in preference to the first symbol in IRAM */
_iram_start = ABSOLUTE(0);
} GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION)
.iram_loader.text :
{
. = ALIGN (16);
_loader_text_start = ABSOLUTE(.);
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
*libzephyr.a:bootloader_flash.*(.literal .text .literal.* .text.*)
*libzephyr.a:bootloader_flash_config_esp32s2.*(.literal .text .literal.* .text.*)
*libzephyr.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
*libzephyr.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
*libzephyr.a:bootloader_init_common.*(.literal .text .literal.* .text.*)
*libzephyr.a:bootloader_flash.*(.literal .text .literal.* .text.*)
*libzephyr.a:bootloader_random.*(.literal .text .literal.* .text.*)
*libzephyr.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
*libzephyr.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
*libzephyr.a:bootloader_efuse_esp32s2.*(.literal .text .literal.* .text.*)
*libzephyr.a:bootloader_utility.*(.literal .text .literal.* .text.*)
*libzephyr.a:bootloader_sha.*(.literal .text .literal.* .text.*)
*libzephyr.a:bootloader_console.*(.literal .text .literal.* .text.*)
*libzephyr.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
*libzephyr.a:bootloader_panic.*(.literal .text .literal.* .text.*)
*libzephyr.a:bootloader_soc.*(.literal .text .literal.* .text.*)
*libzephyr.a:esp_image_format.*(.literal .text .literal.* .text.*)
*libzephyr.a:flash_encrypt.*(.literal .text .literal.* .text.*)
*libzephyr.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
*libzephyr.a:flash_partitions.*(.literal .text .literal.* .text.*)
*libzephyr.a:secure_boot.*(.literal .text .literal.* .text.*)
*libzephyr.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
*libzephyr.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
*libzephyr.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
*libzephyr.a:esp_efuse_table.*(.literal .text .literal.* .text.*)
*libzephyr.a:esp_efuse_fields.*(.literal .text .literal.* .text.*)
*libzephyr.a:esp_efuse_api.*(.literal .text .literal.* .text.*)
*libzephyr.a:esp_efuse_utility.*(.literal .text .literal.* .text.*)
*libzephyr.a:esp_efuse_api_key_esp32xx.*(.literal .text .literal.* .text.*)
*esp_mcuboot.*(.literal .text .literal.* .text.*)
*esp_loader.*(.literal .text .literal.* .text.*)
*libzephyr.a:mmu_hal.*(.literal .text .literal.* .text.*)
*libzephyr.a:rtc_clk.*(.literal .literal.* .text .text.*)
*libzephyr.a:rtc_clk_init.*(.literal .literal.* .text .text.*)
*libzephyr.a:rtc_time.*(.literal .literal.* .text .text.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_loader_text_end = ABSOLUTE(.);
} > iram_loader_seg
SECTION_PROLOGUE(_TEXT_SECTION_NAME, , ALIGN(4))
{
/* Code marked as running out of IRAM */
_iram_text_start = ABSOLUTE(.);
*(.iram1 .iram1.*)
*(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
. = ALIGN(4);
_iram_text_end = ABSOLUTE(.);
_iram_end = ABSOLUTE(.);
} GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION)
/* Shared RAM */ /* Shared RAM */
SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD),) .bss (NOLOAD):
{ {
. = ALIGN (8); . = ALIGN (8);
_bss_start = ABSOLUTE(.); /* required by bluetooth library */ _bss_start = ABSOLUTE(.); /* required by bluetooth library */
__bss_start = ABSOLUTE(.); __bss_start = ABSOLUTE(.);
_btdm_bss_start = ABSOLUTE(.);
*libbtdm_app.a:(.bss .bss.* COMMON)
. = ALIGN (4);
_btdm_bss_end = ABSOLUTE(.);
/* Buffer for system heap should be placed in dram_seg */
*libkernel.a:mempool.*(.noinit.kheap_buf__system_heap .noinit.*.kheap_buf__system_heap)
*(.dynsbss) *(.dynsbss)
*(.sbss) *(.sbss)
*(.sbss.*) *(.sbss.*)
@ -294,35 +267,9 @@ SECTIONS
__bss_end = ABSOLUTE(.); __bss_end = ABSOLUTE(.);
_bss_end = ABSOLUTE(.); _bss_end = ABSOLUTE(.);
_end = ABSOLUTE(.); _end = ABSOLUTE(.);
} GROUP_LINK_IN(RAMABLE_REGION) } > dram_seg
ASSERT(((__bss_end - ORIGIN(RAMABLE_REGION)) <= LENGTH(RAMABLE_REGION)), ASSERT(((__bss_end - ORIGIN(dram_seg)) <= LENGTH(dram_seg)), "DRAM segment data does not fit.")
"DRAM segment data does not fit.")
SECTION_DATA_PROLOGUE(_NOINIT_SECTION_NAME, (NOLOAD),)
{
. = ALIGN (8);
*(.noinit)
*(.noinit.*)
. = ALIGN (8);
} GROUP_LINK_IN(RAMABLE_REGION_1)
.flash.text : ALIGN(IROM_SEG_ALIGN)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.literal .text .literal.* .text.*)
. = ALIGN(4);
_text_end = ABSOLUTE(.);
_etext = .;
/* Similar to _iram_start, this symbol goes here so it is
* resolved by addr2line in preference to the first symbol in
* the flash.text segment.
*/
_flash_cache_start = ABSOLUTE(0);
} GROUP_DATA_LINK_IN(FLASH_CODE_REGION, ROMABLE_REGION)
#include <zephyr/linker/debug-sections.ld> #include <zephyr/linker/debug-sections.ld>
@ -363,8 +310,4 @@ SECTIONS
#ifdef CONFIG_GEN_ISR_TABLES #ifdef CONFIG_GEN_ISR_TABLES
#include <zephyr/linker/intlist.ld> #include <zephyr/linker/intlist.ld>
#endif #endif
} }
ASSERT(((_iram_end - ORIGIN(IRAM_REGION)) <= LENGTH(IRAM_REGION)),
"IRAM0 segment data does not fit.")

65
soc/espressif/esp32s2/memory.h Normal file
View file

@ -0,0 +1,65 @@
/*
* Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
/* SRAM0 (32k) with adjacted SRAM1 (288k)
* Ibus and Dbus address space
*/
#define SRAM_IRAM_START 0x40020000
#define SRAM_DRAM_START 0x3ffb0000
#define SRAM_CACHE_SIZE (CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \
+ CONFIG_ESP32S2_DATA_CACHE_SIZE)
/** Simplified memory map for the bootloader.
* Make sure the bootloader can load into main memory without overwriting itself.
*
* ESP32-S2 ROM static data usage is as follows:
* - 0x3ffeab00 - 0x3fffc410: Shared buffers, used in UART/USB/SPI download mode only
* - 0x3fffc410 - 0x3fffe710: CPU stack, can be reclaimed as heap after RTOS startup
* - 0x3fffe710 - 0x40000000: ROM .bss and .data (not easily reclaimable)
*
* The 2nd stage bootloader can take space up to the end of ROM shared
* buffers area (0x3fffc410). For alignment purpose we shall use value (0x3fce9700).
*/
/* The offset between Dbus and Ibus.
* Used to convert between 0x4002xxxx and 0x3ffbxxxx addresses.
*/
#define IRAM_DRAM_OFFSET 0x70000
#define DRAM_BUFFERS_START 0x3ffeab00
#define DRAM_STACK_START 0x3fffc410
#define DRAM_ROM_BSS_DATA_START 0x3fffe710
/* Base address used for calculating memory layout
* counted from Dbus backwards and back to the Ibus
*/
#define BOOTLOADER_USABLE_DRAM_END DRAM_BUFFERS_START
/* For safety margin between bootloader data section and startup stacks */
#define BOOTLOADER_STACK_OVERHEAD 0x0
#define BOOTLOADER_DRAM_SEG_LEN 0x6000
#define BOOTLOADER_IRAM_LOADER_SEG_LEN 0x2800
#define BOOTLOADER_IRAM_SEG_LEN 0x8000
/* Start of the lower region is determined by region size and the end of the higher region */
#define BOOTLOADER_DRAM_SEG_END (BOOTLOADER_USABLE_DRAM_END - BOOTLOADER_STACK_OVERHEAD)
#define BOOTLOADER_DRAM_SEG_START (BOOTLOADER_DRAM_SEG_END - BOOTLOADER_DRAM_SEG_LEN)
#define BOOTLOADER_IRAM_LOADER_SEG_START (BOOTLOADER_DRAM_SEG_START - \
BOOTLOADER_IRAM_LOADER_SEG_LEN + IRAM_DRAM_OFFSET)
#define BOOTLOADER_IRAM_SEG_START (BOOTLOADER_IRAM_LOADER_SEG_START - BOOTLOADER_IRAM_SEG_LEN)
/* Flash */
#ifdef CONFIG_FLASH_SIZE
#define FLASH_SIZE CONFIG_FLASH_SIZE
#else
#define FLASH_SIZE 0x400000
#endif
/* Cached memories */
#define CACHE_ALIGN CONFIG_MMU_PAGE_SIZE
#define IROM_SEG_ORG 0x40080000
#define IROM_SEG_LEN 0x780000
#define DROM_SEG_ORG 0x3f000000
#define DROM_SEG_LEN FLASH_SIZE

9
soc/espressif/esp32s2/soc.c
View file

@ -75,12 +75,7 @@ void __attribute__((section(".iram1"))) __esp_platform_start(void)
esp_reset_reason_init(); esp_reset_reason_init();
#ifdef CONFIG_MCUBOOT #ifndef CONFIG_MCUBOOT
/* MCUboot early initialisation. */
if (bootloader_init()) {
abort();
}
#else
/* ESP-IDF 2nd stage bootloader enables RTC WDT to check on startup sequence /* ESP-IDF 2nd stage bootloader enables RTC WDT to check on startup sequence
* related issues in application. Hence disable that as we are about to start * related issues in application. Hence disable that as we are about to start
* Zephyr environment. * Zephyr environment.
@ -152,7 +147,7 @@ void __attribute__((section(".iram1"))) __esp_platform_start(void)
#if CONFIG_SOC_FLASH_ESP32 || CONFIG_ESP_SPIRAM #if CONFIG_SOC_FLASH_ESP32 || CONFIG_ESP_SPIRAM
spi_flash_guard_set(&g_flash_guard_default_ops); spi_flash_guard_set(&g_flash_guard_default_ops);
#endif #endif
#endif /* CONFIG_MCUBOOT */ #endif /* !CONFIG_MCUBOOT */
esp_intr_initialize(); esp_intr_initialize();
/* Start Zephyr */ /* Start Zephyr */