From 31ebb79c86da8d99bc9da52f1de068355dc88f28 Mon Sep 17 00:00:00 2001 From: Yong Cong Sin Date: Fri, 30 Aug 2024 12:17:49 +0800 Subject: [PATCH] arch: multilevel_irq: fix interrupt bits check The bits allocated for each aggregator level only need to be enough to encode CONFIG_MAX_IRQ_PER_AGGREGATOR, instead of the combined number of IRQs from all aggregators in that level. Add additional check for L3 interrupts as well, if it is enabled. Updated the assert in `z_get_sw_isr_table_idx()` to be more verbose. Signed-off-by: Yong Cong Sin Signed-off-by: Yong Cong Sin --- arch/common/multilevel_irq.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/common/multilevel_irq.c b/arch/common/multilevel_irq.c index be2e8892e1f..55bd3b277f0 100644 --- a/arch/common/multilevel_irq.c +++ b/arch/common/multilevel_irq.c @@ -11,9 +11,12 @@ #include #include -BUILD_ASSERT((CONFIG_NUM_2ND_LEVEL_AGGREGATORS * CONFIG_MAX_IRQ_PER_AGGREGATOR) <= - BIT(CONFIG_2ND_LEVEL_INTERRUPT_BITS), +BUILD_ASSERT(CONFIG_MAX_IRQ_PER_AGGREGATOR < BIT(CONFIG_2ND_LEVEL_INTERRUPT_BITS), "L2 bits not enough to cover the number of L2 IRQs"); +#ifdef CONFIG_3RD_LEVEL_INTERRUPTS +BUILD_ASSERT(CONFIG_MAX_IRQ_PER_AGGREGATOR < BIT(CONFIG_3RD_LEVEL_INTERRUPT_BITS), + "L3 bits not enough to cover the number of L3 IRQs"); +#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */ /** * @brief Get the aggregator that's responsible for the given irq @@ -85,7 +88,8 @@ unsigned int z_get_sw_isr_table_idx(unsigned int irq) table_idx -= CONFIG_GEN_IRQ_START_VECTOR; - __ASSERT_NO_MSG(table_idx < IRQ_TABLE_SIZE); + __ASSERT(table_idx < IRQ_TABLE_SIZE, "table_idx(%d) < IRQ_TABLE_SIZE(%d)", table_idx, + IRQ_TABLE_SIZE); return table_idx; }