From 31b54e7cee88a8274878c5351051a422967c7da7 Mon Sep 17 00:00:00 2001 From: Grant Ramsay Date: Tue, 15 Oct 2024 10:23:45 +1300 Subject: [PATCH] arch: arm: cortex_m: Include TBLBASE in VTOR mask if present In some Cortex-M3 implementations SCB_VTOR bit[29] is called the TBLBASE bit. This enables setting VTOR to an SRAM address for qemu_cortex_m3 Signed-off-by: Grant Ramsay --- arch/arm/core/cortex_m/prep_c.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm/core/cortex_m/prep_c.c b/arch/arm/core/cortex_m/prep_c.c index 10f78c44a25..ae59960584c 100644 --- a/arch/arm/core/cortex_m/prep_c.c +++ b/arch/arm/core/cortex_m/prep_c.c @@ -45,9 +45,16 @@ void *_vector_table_pointer; #define VECTOR_ADDRESS ((uintptr_t)_vector_start) +/* In some Cortex-M3 implementations SCB_VTOR bit[29] is called the TBLBASE bit */ +#ifdef SCB_VTOR_TBLBASE_Msk +#define VTOR_MASK (SCB_VTOR_TBLBASE_Msk | SCB_VTOR_TBLOFF_Msk) +#else +#define VTOR_MASK SCB_VTOR_TBLOFF_Msk +#endif + static inline void relocate_vector_table(void) { - SCB->VTOR = VECTOR_ADDRESS & SCB_VTOR_TBLOFF_Msk; + SCB->VTOR = VECTOR_ADDRESS & VTOR_MASK; barrier_dsync_fence_full(); barrier_isync_fence_full(); }