From 315dd0f41cddfeb38654bbcf416aa60cd6e9520f Mon Sep 17 00:00:00 2001 From: Adam Wojasinski Date: Tue, 8 Aug 2023 16:31:58 +0200 Subject: [PATCH] drivers: spi: spi_nrfx_spim: Add CPOL handling on SCK pin Pin state after SPIM deinitialization is based on pinctrl configuration. On the other hand, CPOL is set during runtime. With the introduction of the power-optimized SPIM driver, it disables the peripheral instance once the transfer is completed. As a result, the GPIO takes control over the SCK pin and drives it based on pinctrl configuration which causes an invalid SCK state when the transaction is configured with CPOL (Clock Polarity). To address this issue, a patch was introduced to the SPIM driver. Now, when a SPIM instance is configured with CPOL, the driver is setting in the runtime the correct state of the SCK pin. Signed-off-by: Adam Wojasinski --- drivers/spi/spi_nrfx_spim.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/spi/spi_nrfx_spim.c b/drivers/spi/spi_nrfx_spim.c index 55ff51cc7b3..256250b5d08 100644 --- a/drivers/spi/spi_nrfx_spim.c +++ b/drivers/spi/spi_nrfx_spim.c @@ -181,6 +181,9 @@ static int configure(const struct device *dev, config.mode = get_nrf_spim_mode(spi_cfg->operation); config.bit_order = get_nrf_spim_bit_order(spi_cfg->operation); + nrfy_gpio_pin_write(nrfy_spim_sck_pin_get(dev_config->spim.p_reg), + spi_cfg->operation & SPI_MODE_CPOL ? 1 : 0); + if (dev_data->initialized) { nrfx_spim_uninit(&dev_config->spim); dev_data->initialized = false;