dts: spi: Add cypress PSoC-6 controller
Add Cypress PSoC-6 SPI controller and pinctrl nodes. Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
This commit is contained in:
Gerson Fernando Budke
Carles Cufí
parent
a0466a6757
commit
3155b762a6
2 changed files with 114 additions and 0 deletions
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@ -10,6 +10,86 @@
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soc {
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soc {
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pinctrl@40310000 {
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pinctrl@40310000 {
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/* instance, signal, port, pin, hsiom [, flag1, ... ] */
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/* instance, signal, port, pin, hsiom [, flag1, ... ] */
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DT_CYPRESS_HSIOM(spi0, mosi, 0, 2, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi0, miso, 0, 3, act_8, input-enable);
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DT_CYPRESS_HSIOM(spi0, clk, 0, 4, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi0, sel0, 0, 5, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi0, sel1, 0, 0, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi0, sel2, 0, 1, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi1, mosi, 10, 0, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi1, miso, 10, 1, act_8, input-enable);
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DT_CYPRESS_HSIOM(spi1, clk, 10, 2, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi1, sel0, 10, 3, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi1, sel1, 10, 4, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi1, sel2, 10, 5, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi1, sel3, 10, 6, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi2, mosi, 9, 0, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi2, miso, 9, 1, act_8, input-enable);
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DT_CYPRESS_HSIOM(spi2, clk, 9, 2, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi2, sel0, 9, 3, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi2, sel1, 9, 4, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi2, sel2, 9, 5, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi2, sel3, 9, 6, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi3, mosi, 6, 0, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi3, miso, 6, 1, act_8, input-enable);
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DT_CYPRESS_HSIOM(spi3, clk, 6, 2, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi3, sel0, 6, 3, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi3, sel1, 7, 7, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi3, sel2, 8, 7, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi3, sel3, 5, 7, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi4, mosi, 7, 0, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi4, miso, 7, 1, act_8, input-enable);
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DT_CYPRESS_HSIOM(spi4, clk, 7, 2, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi4, sel0, 7, 3, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi4, sel1, 7, 4, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi4, sel2, 7, 5, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi4, sel3, 7, 6, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi4, mosi, 8, 0, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi4, miso, 8, 1, act_8, input-enable);
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DT_CYPRESS_HSIOM(spi4, clk, 8, 2, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi4, sel0, 8, 3, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi4, sel1, 8, 4, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi4, sel2, 8, 5, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi4, sel3, 8, 6, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi5, mosi, 5, 0, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi5, miso, 5, 1, act_8, input-enable);
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DT_CYPRESS_HSIOM(spi5, clk, 5, 2, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi5, sel0, 5, 3, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi5, sel1, 5, 4, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi5, sel2, 5, 5, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi5, sel3, 5, 6, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi5, mosi, 11, 0, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi5, miso, 11, 1, act_8, input-enable);
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DT_CYPRESS_HSIOM(spi5, clk, 11, 2, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi5, sel0, 11, 3, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi5, sel1, 11, 4, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi5, sel2, 11, 5, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi5, sel3, 11, 6, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi6, mosi, 6, 4, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi6, miso, 6, 5, act_8, input-enable);
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DT_CYPRESS_HSIOM(spi6, clk, 6, 6, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi6, sel0, 6, 7, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi6, mosi, 12, 0, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi6, miso, 12, 1, act_8, input-enable);
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DT_CYPRESS_HSIOM(spi6, clk, 12, 2, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi6, sel0, 12, 3, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi6, sel1, 12, 4, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi6, sel2, 12, 5, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi6, sel3, 12, 6, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi6, mosi, 13, 0, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi6, miso, 13, 1, act_8, input-enable);
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DT_CYPRESS_HSIOM(spi6, clk, 13, 2, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi6, sel0, 13, 3, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi6, sel1, 13, 4, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi6, sel2, 13, 5, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi6, sel3, 13, 6, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi7, mosi, 1, 0, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi7, miso, 1, 1, act_8, input-enable);
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DT_CYPRESS_HSIOM(spi7, clk, 1, 2, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi7, sel0, 1, 3, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi7, sel1, 1, 4, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(spi7, sel2, 1, 5, act_8, drive-push-pull);
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DT_CYPRESS_HSIOM(uart0, rx, 0, 2, act_6, input-enable);
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DT_CYPRESS_HSIOM(uart0, rx, 0, 2, act_6, input-enable);
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DT_CYPRESS_HSIOM(uart0, tx, 0, 3, act_6, drive-push-pull);
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DT_CYPRESS_HSIOM(uart0, tx, 0, 3, act_6, drive-push-pull);
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DT_CYPRESS_HSIOM(uart0, rts, 0, 4, act_6, drive-push-pull);
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DT_CYPRESS_HSIOM(uart0, rts, 0, 4, act_6, drive-push-pull);
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34
dts/bindings/spi/cypress,psoc6-spi.yaml
Normal file
34
dts/bindings/spi/cypress,psoc6-spi.yaml
Normal file
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@ -0,0 +1,34 @@
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# Copyright (c) 2021, ATL Electronics
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# SPDX-License-Identifier: Apache-2.0
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description: Cypress SBC[SPI]
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compatible: "cypress,psoc6-spi"
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include: spi-controller.yaml
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properties:
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reg:
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required: true
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interrupts:
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required: true
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peripheral-id:
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type: int
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description: peripheral ID
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required: true
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pinctrl-0:
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type: phandles
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description: |
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Port pin configuration for the various SPI signals that includes
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MISO, MOSI, SCK, and possibly various chip selects signals. We
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expect that the phandles will reference pinctrl nodes. These
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nodes will have a nodelabel that matches the Cypress SoC HAL defines
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and be of the form p<port>_<pin>_<periph><inst>_<signal>.
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For example the SPI on PSoC-63 Pioneer Kit would be
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pinctrl-0 = <&p12_0_spi6_mosi &p12_1_spi6_miso &p12_2_spi6_clk &p12_3_spi6_sel0>;
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required: true
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