soc: sam: Add SUPC driver and dts model

This commit adds a driver and dts model for the ATMEL SAM
SUPC component.

Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>

dts/bindings/power/atmel,sam-supc.yaml

@@ -0,0 +1,47 @@
+# Copyright (c) 2023 Bjarki Arge Andreasen
+# SPDX-License-Identifier: Apache-2.0
+
+description: |
+  Atmel SAM SUPC (Supply-Controller) controller
+
+  The supply controller manages the voltage reference, power supply and supply
+  monitoring of the device. It have a special feature that it can wake-up the
+  device from a low-power state using special peripherals as wake-up sources.
+
+  The dedicated peripherals that can wake-up the core supply domain are: RTC,
+  RTT, Supply Monitor and GPIOs. In the first three peripherals it is necessary
+  inform the wakeup-source-id property on their respective nodes.
+
+    rtc: rtc@xxx {
+      ...
+      wakeup-source-id = <&supc SUPC_WAKEUP_SOURCE_RTC>;
+      ...
+    };
+
+  The special peripheral will wake-up the device only when the standard property
+  wakeup-source is defined, e.g.:
+
+    &rtc {
+      ...
+      wakeup-source;
+      ...
+    };
+
+  The SUPC wakeup source ids that can be enabled are defined in the
+  zephyr/include/zephyr/dt-bindings/power/atmel_sam_supc.h header file.
+
+compatible: "atmel,sam-supc"
+
+include:
+  - name: base.yaml
+
+properties:
+  reg:
+    required: true
+
+  "#wakeup-source-id-cells":
+    type: int
+    const: 1
+
+wakeup-source-id-cells:
+  - wakeup-source-id

include/zephyr/drivers/power/atmel_sam_supc.h

@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2023 Bjarki Arge Andreasen
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_INCLUDE_DRIVERS_POWER_ATMEL_SAM_SUPC_H_
+#define ZEPHYR_INCLUDE_DRIVERS_POWER_ATMEL_SAM_SUPC_H_
+
+#define SAM_DT_SUPC_CONTROLLER DEVICE_DT_GET(DT_NODELABEL(supc))
+
+#define SAM_DT_SUPC_WAKEUP_SOURCE_ID(node_id) \
+	DT_PROP_BY_IDX(node_id, wakeup_source_id wakeup_source_id)
+
+#define SAM_DT_INST_SUPC_WAKEUP_SOURCE_ID(inst) \
+	SAM_DT_SUPC_WAKEUP_SOURCE_ID(DT_DRV_INST(inst))
+
+#endif /* ZEPHYR_INCLUDE_DRIVERS_POWER_ATMEL_SAM_SUPC_H_ */

include/zephyr/dt-bindings/power/atmel_sam_supc.h

@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2023 Bjarki Arge Andreasen
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_POWER_ATMEL_SAM_SUPC_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_POWER_ATMEL_SAM_SUPC_H_
+
+#define SUPC_WAKEUP_SOURCE_FWUP 0
+#define SUPC_WAKEUP_SOURCE_SM   1
+#define SUPC_WAKEUP_SOURCE_RTT  2
+#define SUPC_WAKEUP_SOURCE_RTC  3
+
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_POWER_ATMEL_SAM_SUPC_H_ */

soc/arm/atmel_sam/common/CMakeLists.txt

@@ -3,6 +3,7 @@
 zephyr_include_directories(.)
 zephyr_library_sources_ifndef(CONFIG_SOC_SERIES_SAM4L soc_pmc.c)
 zephyr_library_sources_ifndef(CONFIG_SOC_SERIES_SAM4L soc_gpio.c)
+zephyr_library_sources_ifndef(CONFIG_SOC_SERIES_SAM4L soc_supc.c)
 
 zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_SAM4L soc_sam4l_pm.c)
 zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_SAM4L soc_sam4l_gpio.c)

soc/arm/atmel_sam/common/soc_supc.c

@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2023 Bjarki Arge Andreasen
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/device.h>
+#include <zephyr/sys/util_macro.h>
+#include <soc.h>
+
+#define SOC_SUPC_WAKEUP_SOURCE_IDS (3)
+
+void soc_supc_core_voltage_regulator_off(void)
+{
+	SUPC->SUPC_CR = SUPC_CR_KEY_PASSWD | SUPC_CR_VROFF_STOP_VREG;
+}
+
+void soc_supc_slow_clock_select_crystal_osc(void)
+{
+	SUPC->SUPC_CR = SUPC_CR_KEY_PASSWD | SUPC_CR_XTALSEL_CRYSTAL_SEL;
+
+	/* Wait for oscillator to be stabilized. */
+	while (!(SUPC->SUPC_SR & SUPC_SR_OSCSEL)) {
+	}
+}
+
+void soc_supc_enable_wakeup_source(uint32_t wakeup_source_id)
+{
+	__ASSERT(wakeup_source_id <= SOC_SUPC_WAKEUP_SOURCE_IDS,
+		 "Wakeup source channel is invalid");
+
+	SUPC->SUPC_WUMR |= 1 << wakeup_source_id;
+}

soc/arm/atmel_sam/common/soc_supc.h

@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2023 Bjarki Arge Andreasen
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _ATMEL_SAM_SOC_SUPC_H_
+#define _ATMEL_SAM_SOC_SUPC_H_
+
+#include <zephyr/types.h>
+
+/**
+ * @brief Enable the clock of specified peripheral module.
+ */
+void soc_supc_core_voltage_regulator_off(void);
+
+/**
+ * @brief Switch slow clock source to external crystal oscillator
+ */
+void soc_supc_slow_clock_select_crystal_osc(void);
+
+/**
+ * @brief Enable wakeup source
+ */
+void soc_supc_enable_wakeup_source(uint32_t wakeup_source_id);
+
+#endif /* _ATMEL_SAM_SOC_SUPC_H_ */

soc/arm/atmel_sam/sam3x/soc.h

@@ -38,6 +38,7 @@
 
 #include "../common/soc_pmc.h"
 #include "../common/soc_gpio.h"
+#include "../common/soc_supc.h"
 #include "../common/atmel_sam_dt.h"
 
 /** Processor Clock (HCLK) Frequency */

soc/arm/atmel_sam/sam4e/soc.h

@@ -38,6 +38,7 @@
 
 #include "../common/soc_pmc.h"
 #include "../common/soc_gpio.h"
+#include "../common/soc_supc.h"
 #include "../common/atmel_sam_dt.h"
 
 /** Processor Clock (HCLK) Frequency */

soc/arm/atmel_sam/sam4s/soc.h

@@ -52,6 +52,7 @@
 
 #include "../common/soc_pmc.h"
 #include "../common/soc_gpio.h"
+#include "../common/soc_supc.h"
 #include "../common/atmel_sam_dt.h"
 
 /** Processor Clock (HCLK) Frequency */

soc/arm/atmel_sam/same70/soc.h

@@ -64,6 +64,7 @@
 
 #include "../common/soc_pmc.h"
 #include "../common/soc_gpio.h"
+#include "../common/soc_supc.h"
 #include "../common/atmel_sam_dt.h"
 
 /** Processor Clock (HCLK) Frequency */

soc/arm/atmel_sam/samv71/soc.h

@@ -65,6 +65,7 @@
 
 #include "../common/soc_pmc.h"
 #include "../common/soc_gpio.h"
+#include "../common/soc_supc.h"
 #include "../common/atmel_sam_dt.h"
 
 /** Processor Clock (HCLK) Frequency */