From 3112f856d2b21e560570ba36b392408ec5852271 Mon Sep 17 00:00:00 2001 From: Daniel Schultz Date: Wed, 30 Apr 2025 08:06:28 +0200 Subject: [PATCH] soc: Add aesc Currently, the only available platform is Nitrogen, featuring a VexRiscv CPU that boots from external SPI flash and runs code from external HyperRAM. Signed-off-by: Daniel Schultz --- soc/aesc/CMakeLists.txt | 6 ++ soc/aesc/Kconfig | 4 ++ soc/aesc/Kconfig.defconfig | 4 ++ soc/aesc/Kconfig.soc | 4 ++ soc/aesc/ip_identification.h | 104 ++++++++++++++++++++++++++++ soc/aesc/nitrogen/CMakeLists.txt | 5 ++ soc/aesc/nitrogen/Kconfig | 16 +++++ soc/aesc/nitrogen/Kconfig.defconfig | 15 ++++ soc/aesc/nitrogen/Kconfig.soc | 15 ++++ soc/aesc/nitrogen/linker.ld | 7 ++ soc/aesc/nitrogen/soc.h | 10 +++ soc/aesc/soc.yml | 4 ++ 12 files changed, 194 insertions(+) create mode 100644 soc/aesc/CMakeLists.txt create mode 100644 soc/aesc/Kconfig create mode 100644 soc/aesc/Kconfig.defconfig create mode 100644 soc/aesc/Kconfig.soc create mode 100644 soc/aesc/ip_identification.h create mode 100644 soc/aesc/nitrogen/CMakeLists.txt create mode 100644 soc/aesc/nitrogen/Kconfig create mode 100644 soc/aesc/nitrogen/Kconfig.defconfig create mode 100644 soc/aesc/nitrogen/Kconfig.soc create mode 100644 soc/aesc/nitrogen/linker.ld create mode 100644 soc/aesc/nitrogen/soc.h create mode 100644 soc/aesc/soc.yml diff --git a/soc/aesc/CMakeLists.txt b/soc/aesc/CMakeLists.txt new file mode 100644 index 00000000000..a53911648ba --- /dev/null +++ b/soc/aesc/CMakeLists.txt @@ -0,0 +1,6 @@ +# Copyright (c) 2025 Aesc Silicon +# SPDX-License-Identifier: Apache-2.0 + +zephyr_include_directories(.) + +add_subdirectory(${SOC_SERIES}) diff --git a/soc/aesc/Kconfig b/soc/aesc/Kconfig new file mode 100644 index 00000000000..c426236d04c --- /dev/null +++ b/soc/aesc/Kconfig @@ -0,0 +1,4 @@ +# Copyright (c) 2025 Aesc Silicon +# SPDX-License-Identifier: Apache-2.0 + +rsource "*/Kconfig" diff --git a/soc/aesc/Kconfig.defconfig b/soc/aesc/Kconfig.defconfig new file mode 100644 index 00000000000..edc3994db18 --- /dev/null +++ b/soc/aesc/Kconfig.defconfig @@ -0,0 +1,4 @@ +# Copyright (c) 2025 Aesc Silicon +# SPDX-License-Identifier: Apache-2.0 + +rsource "*/Kconfig.defconfig" diff --git a/soc/aesc/Kconfig.soc b/soc/aesc/Kconfig.soc new file mode 100644 index 00000000000..9b45959d5e8 --- /dev/null +++ b/soc/aesc/Kconfig.soc @@ -0,0 +1,4 @@ +# Copyright (c) 2025 Aesc Silicon +# SPDX-License-Identifier: Apache-2.0 + +rsource "*/Kconfig.soc" diff --git a/soc/aesc/ip_identification.h b/soc/aesc/ip_identification.h new file mode 100644 index 00000000000..0220798e0b6 --- /dev/null +++ b/soc/aesc/ip_identification.h @@ -0,0 +1,104 @@ +/** @file + * @brief IP Identification API. + * + * Copyright (c) 2025 Aesc Silicon + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#ifndef INCLUDE_DRIVERS_AESC_IP_IDENTIFICATION_H_ +#define INCLUDE_DRIVERS_AESC_IP_IDENTIFICATION_H_ +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Each Aesc Silicon IP core is equipped with a so-called IP identification + * table at the beginning of each register map. This table helps to identify + * the underlying hardware. + * + * IP identification table for API v0: + * + * +---------+---------+---------+---------+ + * | 31 - 24 | 23 - 16 | 15 - 8 | 7 - 0 | + * +=========+=========+=========+=========+ + * | API | Length | ID | 0x00 (header) + * +---------+---------+-------------------+ + * | Major | Minor | Patch | 0x04 (version) + * +---------+---------+-------------------+ + * + * header.api_version: Version of this IP identification table. + * header.length: Total length of the IP identification table. + * Important to relocate the register map. + * header.id: ID of this IP core. + * version: Defines the version of this IP core with major.minor.patchlevel. + */ + +struct aesc_ip_id_table { + uint32_t header; + uint32_t version; +}; + +#define CONV_ADDR(addr) ((struct aesc_ip_id_table *)addr) + +#define HEADER_API_MASK GENMASK(31, 24) +#define HEADER_LENGTH_MASK GENMASK(23, 16) +#define HEADER_ID_MASK GENMASK(15, 0) +#define VERSION_MAJOR_MASK GENMASK(31, 24) +#define VERSION_MINOR_MASK GENMASK(23, 16) +#define VERSION_PATCH_MASK GENMASK(15, 0) + +static inline unsigned int ip_id_get_major_version(volatile uintptr_t *addr) +{ + const volatile struct aesc_ip_id_table *table = CONV_ADDR(addr); + + return FIELD_GET(VERSION_MAJOR_MASK, table->version); +} + +static inline unsigned int ip_id_get_minor_version(volatile uintptr_t *addr) +{ + const volatile struct aesc_ip_id_table *table = CONV_ADDR(addr); + + return FIELD_GET(VERSION_MINOR_MASK, table->version); +} + +static inline unsigned int ip_id_get_patchlevel(volatile uintptr_t *addr) +{ + const volatile struct aesc_ip_id_table *table = CONV_ADDR(addr); + + return FIELD_GET(VERSION_PATCH_MASK, table->version); +} + +static inline unsigned int ip_id_get_api_version(volatile uintptr_t *addr) +{ + const volatile struct aesc_ip_id_table *table = CONV_ADDR(addr); + + return FIELD_GET(HEADER_API_MASK, table->header); +} + +static inline unsigned int ip_id_get_header_length(volatile uintptr_t *addr) +{ + const volatile struct aesc_ip_id_table *table = CONV_ADDR(addr); + + return FIELD_GET(HEADER_LENGTH_MASK, table->header); +} + +static inline unsigned int ip_id_get_id(volatile uintptr_t *addr) +{ + const volatile struct aesc_ip_id_table *table = CONV_ADDR(addr); + + return FIELD_GET(HEADER_ID_MASK, table->header); +} + +static inline uintptr_t ip_id_relocate_driver(volatile uintptr_t *addr) +{ + return (uintptr_t)addr + ip_id_get_header_length(addr); +} + +#ifdef __cplusplus +} +#endif +#endif /* INCLUDE_DRIVERS_AESC_IP_IDENTIFICATION_H_ */ diff --git a/soc/aesc/nitrogen/CMakeLists.txt b/soc/aesc/nitrogen/CMakeLists.txt new file mode 100644 index 00000000000..2a63c1a865b --- /dev/null +++ b/soc/aesc/nitrogen/CMakeLists.txt @@ -0,0 +1,5 @@ +zephyr_include_directories(.) + +set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/linker.ld + CACHE INTERNAL "SoC Linker script ${SOC_NAME}" +) diff --git a/soc/aesc/nitrogen/Kconfig b/soc/aesc/nitrogen/Kconfig new file mode 100644 index 00000000000..abfffdb8ec7 --- /dev/null +++ b/soc/aesc/nitrogen/Kconfig @@ -0,0 +1,16 @@ +# Copyright (c) 2025 Aesc Silicon +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_NITROGEN + select RISCV + select RISCV_PRIVILEGED + select INCLUDE_RESET_VECTOR + select ATOMIC_OPERATIONS_C + select RISCV_ISA_RV32I + select RISCV_ISA_EXT_M + select RISCV_ISA_EXT_C + select RISCV_ISA_EXT_ZICSR + select RISCV_ISA_EXT_ZIFENCEI + +config SOC_PART_NUMBER + default "elemrv_n" if SOC_ELEMRV_N diff --git a/soc/aesc/nitrogen/Kconfig.defconfig b/soc/aesc/nitrogen/Kconfig.defconfig new file mode 100644 index 00000000000..7d24f7957af --- /dev/null +++ b/soc/aesc/nitrogen/Kconfig.defconfig @@ -0,0 +1,15 @@ +# Copyright (c) 2025 Aesc Silicon +# SPDX-License-Identifier: Apache-2.0 + +if SOC_SERIES_NITROGEN + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency) + +config NUM_IRQS + default 12 + +config XIP + default n + +endif # SOC_SERIES_NITROGEN diff --git a/soc/aesc/nitrogen/Kconfig.soc b/soc/aesc/nitrogen/Kconfig.soc new file mode 100644 index 00000000000..186f3549a10 --- /dev/null +++ b/soc/aesc/nitrogen/Kconfig.soc @@ -0,0 +1,15 @@ +# Copyright (c) 2025 Aesc Silicon +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_NITROGEN + bool + +config SOC_ELEMRV_N + bool + select SOC_SERIES_NITROGEN + +config SOC_SERIES + default "nitrogen" if SOC_SERIES_NITROGEN + +config SOC + default "elemrv_n" if SOC_ELEMRV_N diff --git a/soc/aesc/nitrogen/linker.ld b/soc/aesc/nitrogen/linker.ld new file mode 100644 index 00000000000..92e3b0a3f5d --- /dev/null +++ b/soc/aesc/nitrogen/linker.ld @@ -0,0 +1,7 @@ +/* + * Copyright (c) 2025 Aesc Silicon + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include diff --git a/soc/aesc/nitrogen/soc.h b/soc/aesc/nitrogen/soc.h new file mode 100644 index 00000000000..066f9266855 --- /dev/null +++ b/soc/aesc/nitrogen/soc.h @@ -0,0 +1,10 @@ +/* + * Copyright (c) 2025 Aesc Silicon + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __RISCV32_AESC_VEXRISCV_NITROGEN_SOC_H_ +#define __RISCV32_AESC_VEXRISCV_NITROGEN_SOC_H_ + +#endif /* __RISCV32_AESC_VEXRISCV_NITROGEN_SOC_H_ */ diff --git a/soc/aesc/soc.yml b/soc/aesc/soc.yml new file mode 100644 index 00000000000..c6e354fcf66 --- /dev/null +++ b/soc/aesc/soc.yml @@ -0,0 +1,4 @@ +series: +- name: nitrogen + socs: + - name: elemrv_n