soc: arm: stm32l0: set voltage scaling to range1
Default Voltage scaling range selection (range2) doesn't allow to configure Max frequency switch to range1 to match any frequency Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This commit is contained in:
parent
7650d917a2
commit
3103fc8c38
1 changed files with 9 additions and 0 deletions
|
@ -15,6 +15,8 @@
|
||||||
#include <arch/arm/aarch32/cortex_m/cmsis.h>
|
#include <arch/arm/aarch32/cortex_m/cmsis.h>
|
||||||
#include <linker/linker-defs.h>
|
#include <linker/linker-defs.h>
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
#include <stm32_ll_bus.h>
|
||||||
|
#include <stm32_ll_pwr.h>
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Perform basic hardware initialization at boot.
|
* @brief Perform basic hardware initialization at boot.
|
||||||
|
@ -43,6 +45,13 @@ static int stm32l0_init(const struct device *arg)
|
||||||
/* At reset, system core clock is set to 2.1 MHz from MSI */
|
/* At reset, system core clock is set to 2.1 MHz from MSI */
|
||||||
SystemCoreClock = 2097152;
|
SystemCoreClock = 2097152;
|
||||||
|
|
||||||
|
/* Default Voltage scaling range selection (range2)
|
||||||
|
* doesn't allow to configure Max frequency
|
||||||
|
* switch to range1 to match any frequency
|
||||||
|
*/
|
||||||
|
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
|
||||||
|
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue