boards: arm: stm32h735g_disco: Enable ADC support

Enable ADC support for the stm32h735g_disco board in devicetree

Signed-off-by: Ben Marsh <ben.marsh@helvar.com>
This commit is contained in:
Ben Marsh 2023-02-06 12:14:58 +00:00 committed by Fabio Baltieri
commit 30e0fa82f8
6 changed files with 43 additions and 2 deletions

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@ -63,6 +63,8 @@ The current Zephyr stm32h735g_disco board configuration supports the following h
+-----------+------------+-------------------------------------+ +-----------+------------+-------------------------------------+
| FMC | on-chip | memc (SDRAM) | | FMC | on-chip | memc (SDRAM) |
+-----------+------------+-------------------------------------+ +-----------+------------+-------------------------------------+
| ADC | on-chip | ADC Controller |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on Zephyr porting. Other hardware features are not yet supported on Zephyr porting.

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@ -106,6 +106,12 @@
status = "okay"; status = "okay";
}; };
&adc1 {
pinctrl-0 = <&adc1_inp0_pa0_c>;
pinctrl-names = "default";
status = "okay";
};
&mac { &mac {
pinctrl-0 = <&eth_mdc_pc1 pinctrl-0 = <&eth_mdc_pc1
&eth_rxd0_pc4 &eth_rxd0_pc4

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@ -13,3 +13,4 @@ supported:
- gpio - gpio
- netif:eth - netif:eth
- memc - memc
- adc

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@ -0,0 +1,24 @@
/* Copyright (c) 2021 STMicroelectronics
SPDX-License-Identifier: Apache-2.0 */
#include <zephyr/dt-bindings/adc/adc.h>
/ {
zephyr,user {
/* adjust channel number according to pinmux in board.dts */
io-channels = <&adc1 0>;
};
};
&adc1 {
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <16>;
};
};

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@ -4,8 +4,8 @@ tests:
sample.drivers.adc: sample.drivers.adc:
tags: ADC tags: ADC
depends_on: adc depends_on: adc
platform_allow: nucleo_l073rz disco_l475_iot1 cc3220sf_launchxl platform_allow: nucleo_l073rz disco_l475_iot1 cc3220sf_launchxl cc3235sf_launchxl
cc3235sf_launchxl stm32l496g_disco nrf51dk_nrf51422 nrf52840dk_nrf52840 stm32l496g_disco stm32h735g_disco nrf51dk_nrf51422 nrf52840dk_nrf52840
mec172xevb_assy6906 gd32f350r_eval gd32f450i_eval gd32vf103v_eval gd32f403z_eval mec172xevb_assy6906 gd32f350r_eval gd32f450i_eval gd32vf103v_eval gd32f403z_eval
esp32 esp32s2_saola esp32c3_devkitm gd32l233r_eval esp32 esp32s2_saola esp32c3_devkitm gd32l233r_eval
integration_platforms: integration_platforms:

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@ -239,6 +239,14 @@
/* Some F3 series SOCs do not have channel 0 connected to an external GPIO. */ /* Some F3 series SOCs do not have channel 0 connected to an external GPIO. */
#define ADC_1ST_CHANNEL_ID 1 #define ADC_1ST_CHANNEL_ID 1
#elif defined(CONFIG_BOARD_STM32H735G_DISCO)
#define ADC_DEVICE_NODE DT_INST(0, st_stm32_adc)
#define ADC_RESOLUTION 16
#define ADC_GAIN ADC_GAIN_1
#define ADC_REFERENCE ADC_REF_INTERNAL
#define ADC_ACQUISITION_TIME ADC_ACQ_TIME_DEFAULT
#define ADC_1ST_CHANNEL_ID 0
#elif defined(CONFIG_BOARD_NUCLEO_L476RG) || \ #elif defined(CONFIG_BOARD_NUCLEO_L476RG) || \
defined(CONFIG_BOARD_BLACKPILL_F411CE) || \ defined(CONFIG_BOARD_BLACKPILL_F411CE) || \
defined(CONFIG_BOARD_STM32F401_MINI) || \ defined(CONFIG_BOARD_STM32F401_MINI) || \