drivers: clock control: nrf: rename CLOCK_CONTROL_NRF5 Kconfig symbol
This commit renames the CLOCK_CONTROL_NRF5 Kconfig symbol to CLOCK_CONTROL_NRF. The change is required to aleviates confusion when selecting the symbol in nRF9160 SOC definition. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
parent
1c7d8cad5c
commit
302a746bd6
17 changed files with 74 additions and 74 deletions
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@ -5,8 +5,8 @@ CONFIG_SOC_NRF51822_QFAA=y
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CONFIG_BOARD_BBC_MICROBIT=y
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CONFIG_BOARD_BBC_MICROBIT=y
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# clock control
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# clock control
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CONFIG_CLOCK_CONTROL_NRF5_K32SRC_RC=y
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CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
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CONFIG_CLOCK_CONTROL_NRF5_K32SRC_250PPM=y
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CONFIG_CLOCK_CONTROL_NRF_K32SRC_250PPM=y
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# enable uart driver
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# enable uart driver
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CONFIG_SERIAL=y
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CONFIG_SERIAL=y
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@ -9,7 +9,7 @@ config BOARD_NRF52_BSIM
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select CONSOLE_HAS_DRIVER
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select CONSOLE_HAS_DRIVER
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select NRF_RTC_TIMER
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select NRF_RTC_TIMER
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select CLOCK_CONTROL
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select CLOCK_CONTROL
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select CLOCK_CONTROL_NRF5
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select CLOCK_CONTROL_NRF
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help
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help
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Will produce a console Linux process which can be executed natively.
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Will produce a console Linux process which can be executed natively.
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It needs the BabbleSim simulator both in compile time and to execute
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It needs the BabbleSim simulator both in compile time and to execute
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@ -1,7 +1,7 @@
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_BEETLE beetle_clock_control.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_BEETLE beetle_clock_control.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_CCM clock_control_mcux_ccm.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_CCM clock_control_mcux_ccm.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_SIM clock_control_mcux_sim.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_SIM clock_control_mcux_sim.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF5 nrf5_power_clock.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF nrf5_power_clock.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_QUARK_SE quark_se_clock_control.c)
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zephyr_sources_ifdef(CONFIG_CLOCK_CONTROL_QUARK_SE quark_se_clock_control.c)
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if(CONFIG_CLOCK_CONTROL_STM32_CUBE)
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if(CONFIG_CLOCK_CONTROL_STM32_CUBE)
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@ -4,45 +4,45 @@
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#
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#
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# SPDX-License-Identifier: Apache-2.0
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# SPDX-License-Identifier: Apache-2.0
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menuconfig CLOCK_CONTROL_NRF5
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menuconfig CLOCK_CONTROL_NRF
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bool "NRF5 Clock controller support"
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bool "NRF Clock controller support"
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depends on SOC_COMPATIBLE_NRF
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depends on SOC_COMPATIBLE_NRF
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help
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help
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Enable support for the Nordic Semiconductor nRF5x series SoC clock
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Enable support for the Nordic Semiconductor nRFxx series SoC clock
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driver.
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driver.
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if CLOCK_CONTROL_NRF5
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if CLOCK_CONTROL_NRF
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config CLOCK_CONTROL_NRF5_IRQ_PRIORITY
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config CLOCK_CONTROL_NRF_IRQ_PRIORITY
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int "Power Clock Interrupt Priority"
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int "Power Clock Interrupt Priority"
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range 0 7
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range 0 7
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default 1
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default 1
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help
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help
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The interrupt priority for Power Clock interrupt.
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The interrupt priority for Power Clock interrupt.
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config CLOCK_CONTROL_NRF5_M16SRC_DRV_NAME
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config CLOCK_CONTROL_NRF_M16SRC_DRV_NAME
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string "NRF5 16MHz clock device name"
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string "NRFx 16MHz clock device name"
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default "clk_m16src"
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default "clk_m16src"
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config CLOCK_CONTROL_NRF5_K32SRC_DRV_NAME
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config CLOCK_CONTROL_NRF_K32SRC_DRV_NAME
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string "NRF5 32KHz clock device name"
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string "NRFx 32KHz clock device name"
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default "clk_k32src"
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default "clk_k32src"
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choice
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choice
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prompt "32KHz clock source"
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prompt "32KHz clock source"
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default CLOCK_CONTROL_NRF5_K32SRC_XTAL
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default CLOCK_CONTROL_NRF_K32SRC_XTAL
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config CLOCK_CONTROL_NRF5_K32SRC_RC
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config CLOCK_CONTROL_NRF_K32SRC_RC
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bool "RC Oscillator"
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bool "RC Oscillator"
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config CLOCK_CONTROL_NRF5_K32SRC_XTAL
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config CLOCK_CONTROL_NRF_K32SRC_XTAL
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bool "Crystal Oscillator"
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bool "Crystal Oscillator"
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endchoice
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endchoice
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config CLOCK_CONTROL_NRF5_K32SRC_BLOCKING
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config CLOCK_CONTROL_NRF_K32SRC_BLOCKING
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bool "Blocking 32KHz crystal oscillator startup"
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bool "Blocking 32KHz crystal oscillator startup"
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depends on CLOCK_CONTROL_NRF5_K32SRC_XTAL
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depends on CLOCK_CONTROL_NRF_K32SRC_XTAL
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help
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help
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Clock control driver will spin wait in CPU sleep until 32KHz
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Clock control driver will spin wait in CPU sleep until 32KHz
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crystal oscillator starts up. If not enabled, RC oscillator will
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crystal oscillator starts up. If not enabled, RC oscillator will
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@ -51,33 +51,33 @@ config CLOCK_CONTROL_NRF5_K32SRC_BLOCKING
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choice
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choice
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prompt "32KHz clock accuracy"
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prompt "32KHz clock accuracy"
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default CLOCK_CONTROL_NRF5_K32SRC_500PPM if CLOCK_CONTROL_NRF5_K32SRC_RC
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default CLOCK_CONTROL_NRF_K32SRC_500PPM if CLOCK_CONTROL_NRF_K32SRC_RC
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default CLOCK_CONTROL_NRF5_K32SRC_20PPM
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default CLOCK_CONTROL_NRF_K32SRC_20PPM
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config CLOCK_CONTROL_NRF5_K32SRC_500PPM
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config CLOCK_CONTROL_NRF_K32SRC_500PPM
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bool "251 ppm to 500 ppm"
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bool "251 ppm to 500 ppm"
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config CLOCK_CONTROL_NRF5_K32SRC_250PPM
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config CLOCK_CONTROL_NRF_K32SRC_250PPM
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bool "151 ppm to 250 ppm"
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bool "151 ppm to 250 ppm"
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config CLOCK_CONTROL_NRF5_K32SRC_150PPM
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config CLOCK_CONTROL_NRF_K32SRC_150PPM
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bool "101 ppm to 150 ppm"
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bool "101 ppm to 150 ppm"
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config CLOCK_CONTROL_NRF5_K32SRC_100PPM
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config CLOCK_CONTROL_NRF_K32SRC_100PPM
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bool "76 ppm to 100 ppm"
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bool "76 ppm to 100 ppm"
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config CLOCK_CONTROL_NRF5_K32SRC_75PPM
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config CLOCK_CONTROL_NRF_K32SRC_75PPM
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bool "51 ppm to 75 ppm"
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bool "51 ppm to 75 ppm"
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config CLOCK_CONTROL_NRF5_K32SRC_50PPM
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config CLOCK_CONTROL_NRF_K32SRC_50PPM
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bool "31 ppm to 50 ppm"
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bool "31 ppm to 50 ppm"
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config CLOCK_CONTROL_NRF5_K32SRC_30PPM
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config CLOCK_CONTROL_NRF_K32SRC_30PPM
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bool "21 ppm to 30 ppm"
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bool "21 ppm to 30 ppm"
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config CLOCK_CONTROL_NRF5_K32SRC_20PPM
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config CLOCK_CONTROL_NRF_K32SRC_20PPM
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bool "0 ppm to 20 ppm"
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bool "0 ppm to 20 ppm"
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endchoice
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endchoice
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endif # CLOCK_CONTROL_NRF5
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endif # CLOCK_CONTROL_NRF
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@ -150,9 +150,9 @@ static int _k32src_start(struct device *dev, clock_control_subsys_t sub_system)
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u32_t imask;
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u32_t imask;
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u32_t stat;
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u32_t stat;
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#if defined(CONFIG_CLOCK_CONTROL_NRF5_K32SRC_BLOCKING)
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#if defined(CONFIG_CLOCK_CONTROL_NRF_K32SRC_BLOCKING)
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u32_t intenset;
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u32_t intenset;
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#endif /* CONFIG_CLOCK_CONTROL_NRF5_K32SRC_BLOCKING */
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#endif /* CONFIG_CLOCK_CONTROL_NRF_K32SRC_BLOCKING */
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/* If the LF clock is already started, but wasn't initialized with
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/* If the LF clock is already started, but wasn't initialized with
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* this function, allow it to run once. This is needed because if a
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* this function, allow it to run once. This is needed because if a
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@ -183,7 +183,7 @@ static int _k32src_start(struct device *dev, clock_control_subsys_t sub_system)
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lf_clk_src = POINTER_TO_UINT(sub_system);
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lf_clk_src = POINTER_TO_UINT(sub_system);
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NRF_CLOCK->LFCLKSRC = lf_clk_src;
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NRF_CLOCK->LFCLKSRC = lf_clk_src;
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#if defined(CONFIG_CLOCK_CONTROL_NRF5_K32SRC_BLOCKING)
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#if defined(CONFIG_CLOCK_CONTROL_NRF_K32SRC_BLOCKING)
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irq_disable(POWER_CLOCK_IRQn);
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irq_disable(POWER_CLOCK_IRQn);
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intenset = NRF_CLOCK->INTENSET;
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intenset = NRF_CLOCK->INTENSET;
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@ -208,13 +208,13 @@ static int _k32src_start(struct device *dev, clock_control_subsys_t sub_system)
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irq_enable(POWER_CLOCK_IRQn);
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irq_enable(POWER_CLOCK_IRQn);
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#else /* !CONFIG_CLOCK_CONTROL_NRF5_K32SRC_BLOCKING */
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#else /* !CONFIG_CLOCK_CONTROL_NRF_K32SRC_BLOCKING */
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/* NOTE: LFCLK will initially start running from the LFRC if LFXO is
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/* NOTE: LFCLK will initially start running from the LFRC if LFXO is
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* selected.
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* selected.
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*/
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*/
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nrf_clock_int_enable(NRF_CLOCK_INT_LF_STARTED_MASK);
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nrf_clock_int_enable(NRF_CLOCK_INT_LF_STARTED_MASK);
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nrf_clock_task_trigger(NRF_CLOCK_TASK_LFCLKSTART);
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nrf_clock_task_trigger(NRF_CLOCK_TASK_LFCLKSTART);
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#endif /* !CONFIG_CLOCK_CONTROL_NRF5_K32SRC_BLOCKING */
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#endif /* !CONFIG_CLOCK_CONTROL_NRF_K32SRC_BLOCKING */
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/* If RC selected, calibrate and start timer for consecutive
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/* If RC selected, calibrate and start timer for consecutive
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* calibrations.
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* calibrations.
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@ -420,7 +420,7 @@ static int _clock_control_init(struct device *dev)
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* NOTE: Currently the operations here are idempotent.
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* NOTE: Currently the operations here are idempotent.
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*/
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*/
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IRQ_CONNECT(NRF5_IRQ_POWER_CLOCK_IRQn,
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IRQ_CONNECT(NRF5_IRQ_POWER_CLOCK_IRQn,
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CONFIG_CLOCK_CONTROL_NRF5_IRQ_PRIORITY,
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CONFIG_CLOCK_CONTROL_NRF_IRQ_PRIORITY,
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_power_clock_isr, 0, 0);
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_power_clock_isr, 0, 0);
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irq_enable(POWER_CLOCK_IRQn);
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irq_enable(POWER_CLOCK_IRQn);
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@ -435,7 +435,7 @@ static const struct clock_control_driver_api _m16src_clock_control_api = {
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};
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};
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DEVICE_AND_API_INIT(clock_nrf5_m16src,
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DEVICE_AND_API_INIT(clock_nrf5_m16src,
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CONFIG_CLOCK_CONTROL_NRF5_M16SRC_DRV_NAME,
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CONFIG_CLOCK_CONTROL_NRF_M16SRC_DRV_NAME,
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_clock_control_init, NULL, NULL, PRE_KERNEL_1,
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_clock_control_init, NULL, NULL, PRE_KERNEL_1,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&_m16src_clock_control_api);
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&_m16src_clock_control_api);
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@ -447,7 +447,7 @@ static const struct clock_control_driver_api _k32src_clock_control_api = {
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};
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};
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DEVICE_AND_API_INIT(clock_nrf5_k32src,
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DEVICE_AND_API_INIT(clock_nrf5_k32src,
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CONFIG_CLOCK_CONTROL_NRF5_K32SRC_DRV_NAME,
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CONFIG_CLOCK_CONTROL_NRF_K32SRC_DRV_NAME,
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_clock_control_init, NULL, NULL, PRE_KERNEL_1,
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_clock_control_init, NULL, NULL, PRE_KERNEL_1,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&_k32src_clock_control_api);
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&_k32src_clock_control_api);
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@ -354,7 +354,7 @@ static int nrf5_init(struct device *dev)
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k_sem_init(&nrf5_radio->tx_wait, 0, 1);
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k_sem_init(&nrf5_radio->tx_wait, 0, 1);
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k_sem_init(&nrf5_radio->cca_wait, 0, 1);
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k_sem_init(&nrf5_radio->cca_wait, 0, 1);
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clk_m16 = device_get_binding(CONFIG_CLOCK_CONTROL_NRF5_M16SRC_DRV_NAME);
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clk_m16 = device_get_binding(CONFIG_CLOCK_CONTROL_NRF_M16SRC_DRV_NAME);
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if (!clk_m16) {
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if (!clk_m16) {
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return -ENODEV;
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return -ENODEV;
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}
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}
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@ -32,7 +32,7 @@ static int send_buf(u8_t *buf, size_t len)
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*/
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*/
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u32_t i = 0U;
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u32_t i = 0U;
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clock = device_get_binding(CONFIG_CLOCK_CONTROL_NRF5_M16SRC_DRV_NAME);
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clock = device_get_binding(CONFIG_CLOCK_CONTROL_NRF_M16SRC_DRV_NAME);
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if (!clock) {
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if (!clock) {
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LOG_ERR("Unable to get HF clock");
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LOG_ERR("Unable to get HF clock");
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return -EIO;
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return -EIO;
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@ -112,7 +112,7 @@ static int temp_nrf5_init(struct device *dev)
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LOG_DBG("");
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LOG_DBG("");
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data->clk_m16_dev =
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data->clk_m16_dev =
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device_get_binding(CONFIG_CLOCK_CONTROL_NRF5_M16SRC_DRV_NAME);
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device_get_binding(CONFIG_CLOCK_CONTROL_NRF_M16SRC_DRV_NAME);
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__ASSERT_NO_MSG(data->clk_m16_dev);
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__ASSERT_NO_MSG(data->clk_m16_dev);
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k_sem_init(&data->device_sync_sem, 0, UINT_MAX);
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k_sem_init(&data->device_sync_sem, 0, UINT_MAX);
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@ -152,7 +152,7 @@ config ALTERA_AVALON_TIMER
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config NRF_RTC_TIMER
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config NRF_RTC_TIMER
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bool "nRF Real Time Counter (NRF_RTC1) Timer"
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bool "nRF Real Time Counter (NRF_RTC1) Timer"
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default y
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default y
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depends on CLOCK_CONTROL_NRF5
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depends on CLOCK_CONTROL_NRF
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select TICKLESS_CAPABLE
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select TICKLESS_CAPABLE
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help
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help
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This module implements a kernel device driver for the nRF Real Time
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This module implements a kernel device driver for the nRF Real Time
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@ -79,12 +79,12 @@ int z_clock_driver_init(struct device *device)
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ARG_UNUSED(device);
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ARG_UNUSED(device);
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clock = device_get_binding(CONFIG_CLOCK_CONTROL_NRF5_K32SRC_DRV_NAME);
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clock = device_get_binding(CONFIG_CLOCK_CONTROL_NRF_K32SRC_DRV_NAME);
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if (!clock) {
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if (!clock) {
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return -1;
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return -1;
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}
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}
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clock_control_on(clock, (void *)CLOCK_CONTROL_NRF5_K32SRC);
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clock_control_on(clock, (void *)CLOCK_CONTROL_NRF_K32SRC);
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/* TODO: replace with counter driver to access RTC */
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/* TODO: replace with counter driver to access RTC */
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nrf_rtc_prescaler_set(RTC, 0);
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nrf_rtc_prescaler_set(RTC, 0);
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@ -479,7 +479,7 @@ static int hf_clock_enable(bool on, bool blocking)
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int ret = -ENODEV;
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int ret = -ENODEV;
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struct device *clock;
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struct device *clock;
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clock = device_get_binding(CONFIG_CLOCK_CONTROL_NRF5_M16SRC_DRV_NAME);
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clock = device_get_binding(CONFIG_CLOCK_CONTROL_NRF_M16SRC_DRV_NAME);
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if (!clock) {
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if (!clock) {
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LOG_ERR("NRF HF Clock device not found!");
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LOG_ERR("NRF HF Clock device not found!");
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return ret;
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return ret;
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@ -14,37 +14,37 @@
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/* TODO: move all these to clock_control.h ? */
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/* TODO: move all these to clock_control.h ? */
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/* Define 32KHz clock source */
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/* Define 32KHz clock source */
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#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_RC
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#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC
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#define CLOCK_CONTROL_NRF5_K32SRC 0
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#define CLOCK_CONTROL_NRF_K32SRC 0
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#endif
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#endif
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#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_XTAL
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#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL
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#define CLOCK_CONTROL_NRF5_K32SRC 1
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#define CLOCK_CONTROL_NRF_K32SRC 1
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#endif
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#endif
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/* Define 32KHz clock accuracy */
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/* Define 32KHz clock accuracy */
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#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_500PPM
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#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM
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#define CLOCK_CONTROL_NRF5_K32SRC_ACCURACY 0
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#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 0
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#endif
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#endif
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#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_250PPM
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#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_250PPM
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#define CLOCK_CONTROL_NRF5_K32SRC_ACCURACY 1
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#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 1
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#endif
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#endif
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#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_150PPM
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#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_150PPM
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#define CLOCK_CONTROL_NRF5_K32SRC_ACCURACY 2
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#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 2
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#endif
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#endif
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#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_100PPM
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#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_100PPM
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#define CLOCK_CONTROL_NRF5_K32SRC_ACCURACY 3
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#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 3
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#endif
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#endif
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#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_75PPM
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#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_75PPM
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||||||
#define CLOCK_CONTROL_NRF5_K32SRC_ACCURACY 4
|
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 4
|
||||||
#endif
|
#endif
|
||||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_50PPM
|
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_50PPM
|
||||||
#define CLOCK_CONTROL_NRF5_K32SRC_ACCURACY 5
|
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 5
|
||||||
#endif
|
#endif
|
||||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_30PPM
|
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_30PPM
|
||||||
#define CLOCK_CONTROL_NRF5_K32SRC_ACCURACY 6
|
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 6
|
||||||
#endif
|
#endif
|
||||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5_K32SRC_20PPM
|
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_20PPM
|
||||||
#define CLOCK_CONTROL_NRF5_K32SRC_ACCURACY 7
|
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 7
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_USB) && defined(CONFIG_SOC_NRF52840)
|
#if defined(CONFIG_USB) && defined(CONFIG_SOC_NRF52840)
|
||||||
|
|
|
@ -12,7 +12,7 @@ config SOC_SERIES_NRF51X
|
||||||
select SOC_FAMILY_NRF
|
select SOC_FAMILY_NRF
|
||||||
select NRF_RTC_TIMER
|
select NRF_RTC_TIMER
|
||||||
select CLOCK_CONTROL
|
select CLOCK_CONTROL
|
||||||
select CLOCK_CONTROL_NRF5
|
select CLOCK_CONTROL_NRF
|
||||||
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
|
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
|
||||||
select XIP
|
select XIP
|
||||||
select HAS_CMSIS
|
select HAS_CMSIS
|
||||||
|
|
|
@ -13,7 +13,7 @@ config SOC_SERIES_NRF52X
|
||||||
select SOC_FAMILY_NRF
|
select SOC_FAMILY_NRF
|
||||||
select NRF_RTC_TIMER
|
select NRF_RTC_TIMER
|
||||||
select CLOCK_CONTROL
|
select CLOCK_CONTROL
|
||||||
select CLOCK_CONTROL_NRF5
|
select CLOCK_CONTROL_NRF
|
||||||
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
|
select SYS_POWER_LOW_POWER_STATE_SUPPORTED
|
||||||
select SYS_POWER_STATE_CPU_LPS_SUPPORTED
|
select SYS_POWER_STATE_CPU_LPS_SUPPORTED
|
||||||
select SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
|
select SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
|
||||||
|
|
|
@ -24,7 +24,7 @@
|
||||||
#include <bluetooth/hci.h>
|
#include <bluetooth/hci.h>
|
||||||
#include <drivers/bluetooth/hci_driver.h>
|
#include <drivers/bluetooth/hci_driver.h>
|
||||||
|
|
||||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5
|
#ifdef CONFIG_CLOCK_CONTROL_NRF
|
||||||
#include <drivers/clock_control/nrf5_clock_control.h>
|
#include <drivers/clock_control/nrf5_clock_control.h>
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -4753,11 +4753,11 @@ static void k32src_wait(void)
|
||||||
done = true;
|
done = true;
|
||||||
|
|
||||||
struct device *lf_clock = device_get_binding(
|
struct device *lf_clock = device_get_binding(
|
||||||
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_DRV_NAME);
|
CONFIG_CLOCK_CONTROL_NRF_K32SRC_DRV_NAME);
|
||||||
|
|
||||||
LL_ASSERT(lf_clock);
|
LL_ASSERT(lf_clock);
|
||||||
|
|
||||||
while (clock_control_on(lf_clock, (void *)CLOCK_CONTROL_NRF5_K32SRC)) {
|
while (clock_control_on(lf_clock, (void *)CLOCK_CONTROL_NRF_K32SRC)) {
|
||||||
DEBUG_CPU_SLEEP(1);
|
DEBUG_CPU_SLEEP(1);
|
||||||
cpu_sleep();
|
cpu_sleep();
|
||||||
DEBUG_CPU_SLEEP(0);
|
DEBUG_CPU_SLEEP(0);
|
||||||
|
|
|
@ -11,7 +11,7 @@
|
||||||
#include <soc.h>
|
#include <soc.h>
|
||||||
#include <device.h>
|
#include <device.h>
|
||||||
#include <clock_control.h>
|
#include <clock_control.h>
|
||||||
#ifdef CONFIG_CLOCK_CONTROL_NRF5
|
#ifdef CONFIG_CLOCK_CONTROL_NRF
|
||||||
#include <drivers/clock_control/nrf5_clock_control.h>
|
#include <drivers/clock_control/nrf5_clock_control.h>
|
||||||
#endif
|
#endif
|
||||||
#include <bluetooth/hci.h>
|
#include <bluetooth/hci.h>
|
||||||
|
@ -127,12 +127,12 @@ int ll_init(struct k_sem *sem_rx)
|
||||||
|
|
||||||
sem_recv = sem_rx;
|
sem_recv = sem_rx;
|
||||||
|
|
||||||
clk_k32 = device_get_binding(CONFIG_CLOCK_CONTROL_NRF5_K32SRC_DRV_NAME);
|
clk_k32 = device_get_binding(CONFIG_CLOCK_CONTROL_NRF_K32SRC_DRV_NAME);
|
||||||
if (!clk_k32) {
|
if (!clk_k32) {
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
|
|
||||||
clock_control_on(clk_k32, (void *)CLOCK_CONTROL_NRF5_K32SRC);
|
clock_control_on(clk_k32, (void *)CLOCK_CONTROL_NRF_K32SRC);
|
||||||
|
|
||||||
entropy = device_get_binding(CONFIG_ENTROPY_NAME);
|
entropy = device_get_binding(CONFIG_ENTROPY_NAME);
|
||||||
if (!entropy) {
|
if (!entropy) {
|
||||||
|
@ -158,12 +158,12 @@ int ll_init(struct k_sem *sem_rx)
|
||||||
hal_ticker_instance0_trigger_set);
|
hal_ticker_instance0_trigger_set);
|
||||||
LL_ASSERT(!err);
|
LL_ASSERT(!err);
|
||||||
|
|
||||||
clk_m16 = device_get_binding(CONFIG_CLOCK_CONTROL_NRF5_M16SRC_DRV_NAME);
|
clk_m16 = device_get_binding(CONFIG_CLOCK_CONTROL_NRF_M16SRC_DRV_NAME);
|
||||||
if (!clk_m16) {
|
if (!clk_m16) {
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
|
|
||||||
err = radio_init(clk_m16, CLOCK_CONTROL_NRF5_K32SRC_ACCURACY, entropy,
|
err = radio_init(clk_m16, CLOCK_CONTROL_NRF_K32SRC_ACCURACY, entropy,
|
||||||
RADIO_CONNECTION_CONTEXT_MAX,
|
RADIO_CONNECTION_CONTEXT_MAX,
|
||||||
RADIO_PACKET_COUNT_RX_MAX,
|
RADIO_PACKET_COUNT_RX_MAX,
|
||||||
RADIO_PACKET_COUNT_TX_MAX,
|
RADIO_PACKET_COUNT_TX_MAX,
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue