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x86: set accessed bit in ROM-based GDT

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Previous configuration was backwards. From the Intel manual:

"If the segment descriptors in the GDT or an LDT are placed in ROM,
the processor can enter an indefinite loop if software or the
processor attempts to update (write to) the ROM-based segment
descriptors. To prevent this problem, set the accessed bits
for all segment descriptors placed in a ROM. Also, remove
operating-system or executive code that attempts to modify
segment descriptors located in ROM."

Only by some miracle has this not been causing problems.

Change-Id: I0bb915962a1069876d2486473760112102feae7b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie 2016-11-16 11:42:03 -08:00 • committed by Anas Nashif
commit 2ffa516d89
1 changed files with 5 additions and 4 deletions
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9
arch/x86/core/crt0.S
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@ -379,9 +379,10 @@ _Idt:
* exceptions even if physical memory does not reside at the referenced
* address.
*
* The 'A' (accessed) bit in the type field is _not_ set for all the
* The 'A' (accessed) bit in the type field is set for all the
* data/code segment descriptors to accommodate placing these entries
* in ROM, since such use is not planned for this platform.
* in ROM, to prevent the processor from freaking out when it tries
* and fails to set it.
*/
#ifndef CONFIG_GDT_DYNAMIC
@ -401,7 +402,7 @@ _gdt_rom:
.word 0xffff /* limit: xffff */
.word 0x0000 /* base : xxxx0000 */
.byte 0x00 /* base : xx00xxxx */
.byte 0x9a /* Code e/r, Present, DPL0 */
.byte 0x9b /* Accessed, Code e/r, Present, DPL0 */
.byte 0xcf /* limit: fxxxx, Page Gra, 32bit */
.byte 0x00 /* base : 00xxxxxx */
@ -410,7 +411,7 @@ _gdt_rom:
.word 0xffff /* limit: xffff */
.word 0x0000 /* base : xxxx0000 */
.byte 0x00 /* base : xx00xxxx */
.byte 0x92 /* Data r/w, Present, DPL0 */
.byte 0x93 /* Accessed, Data r/w, Present, DPL0 */
.byte 0xcf /* limit: fxxxx, Page Gra, 32bit */
.byte 0x00 /* base : 00xxxxxx */