From 2fe357a592560323d1dad434451b7282bb2ca70e Mon Sep 17 00:00:00 2001
From: jacob kung <jacob.kung@egistec.com>
Date: Wed, 28 May 2025 00:28:51 +0800
Subject: [PATCH] drivers: dma: atcdmac300: add flush chain_block when Data
 cache is enabled

Add cache flush to ensure dma_chain is written back to memory
for DMA coherence

Signed-off-by: jacob kung <jacob.kung@egistec.com>
---
 drivers/dma/dma_andes_atcdmac300.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/dma/dma_andes_atcdmac300.c b/drivers/dma/dma_andes_atcdmac300.c
index e2856b4d250..73c65371065 100644
--- a/drivers/dma/dma_andes_atcdmac300.c
+++ b/drivers/dma/dma_andes_atcdmac300.c
@@ -12,6 +12,12 @@
 #include <zephyr/init.h>
 #include <zephyr/drivers/dma.h>
 
+#ifdef CONFIG_DCACHE
+#ifdef CONFIG_CACHE_MANAGEMENT
+#include <zephyr/cache.h>
+#endif
+#endif
+
 #define DT_DRV_COMPAT andestech_atcdmac300
 
 #define LOG_LEVEL CONFIG_DMA_LOG_LEVEL
@@ -393,6 +399,15 @@ static int dma_atcdmac300_config(const struct device *dev, uint32_t channel,
 		sys_write32(0, DMA_CH_LL_PTR_H(dev, channel));
 	}
 
+#ifdef CONFIG_DCACHE
+#ifdef CONFIG_CACHE_MANAGEMENT
+	cache_data_flush_range((void *)&dma_chain, sizeof(dma_chain));
+#else
+#error "Data cache is enabled; please flush the cache after \
+setting dma_chain to ensure memory coherence."
+#endif
+#endif
+
 end:
 	return ret;
 }