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serial: Provide new numbering scheme for stm32 UART

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There was a misalignment between Zephyr UART device numbering and
SoC UART IP. Device "UART_1" was mapped to IP USART_2, which could
be confusing for user.
This commit allows to align "UART_1" to IP USART_1.
Change is propagated to all STM32F103RB/STM32F401RE based boards and
respective pinmux drivers

Change-Id: Ia8099dfeec7b9c0c686c2a58ccb4dbb1a55b6537
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2016-11-14 11:59:45 +01:00 • committed by Kumar Gala
commit 2fcf3435c1
13 changed files with 160 additions and 159 deletions
Download patch file Download diff file Expand all files Collapse all files

18
arch/arm/soc/st_stm32/stm32f4/Kconfig.defconfig.series
View file

@ -40,15 +40,6 @@ config UART_CONSOLE
config UART_STM32 config UART_STM32
def_bool y def_bool y
config UART_STM32_PORT_0
def_bool y
config UART_STM32_PORT_0_NAME
default UART_0
config UART_STM32_PORT_0_BAUD_RATE
default 115200
config UART_STM32_PORT_1 config UART_STM32_PORT_1
def_bool y def_bool y
@ -58,6 +49,15 @@ config UART_STM32_PORT_1_NAME
config UART_STM32_PORT_1_BAUD_RATE config UART_STM32_PORT_1_BAUD_RATE
default 115200 default 115200
config UART_STM32_PORT_2
def_bool y
config UART_STM32_PORT_2_NAME
default UART_2
config UART_STM32_PORT_2_BAUD_RATE
default 115200
endif #SERIAL endif #SERIAL
if CLOCK_CONTROL if CLOCK_CONTROL

6
boards/arm/96b_carbon/96b_carbon_defconfig
View file

@ -7,10 +7,10 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000 CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
# enable USART1 - passthrough to FT230XQ # enable USART1 - passthrough to FT230XQ
CONFIG_UART_STM32_PORT_0=y CONFIG_UART_STM32_PORT_1=y
CONFIG_UART_STM32_PORT_0_BAUD_RATE=115200 CONFIG_UART_STM32_PORT_1_BAUD_RATE=115200
# enable console on this port by default # enable console on this port by default
CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_0" CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_1"
# enable pinmux # enable pinmux
CONFIG_PINMUX=y CONFIG_PINMUX=y

6
boards/arm/nucleo_f103rb/nucleo_f103rb_defconfig
View file

@ -11,12 +11,12 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
CONFIG_SERIAL=y CONFIG_SERIAL=y
CONFIG_UART_STM32=y CONFIG_UART_STM32=y
# enable USART2 - passthrough to STLINK v2 connector # enable USART2 - passthrough to STLINK v2 connector
CONFIG_UART_STM32_PORT_1=y CONFIG_UART_STM32_PORT_2=y
CONFIG_UART_STM32_PORT_1_BAUD_RATE=115200 CONFIG_UART_STM32_PORT_2_BAUD_RATE=115200
# enable console on this port by default # enable console on this port by default
CONFIG_CONSOLE=y CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y CONFIG_UART_CONSOLE=y
CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_1" CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_2"
# enable pinmux # enable pinmux
CONFIG_PINMUX=y CONFIG_PINMUX=y

6
boards/arm/nucleo_f401re/nucleo_f401re_defconfig
View file

@ -7,10 +7,10 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000 CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
# enable USART2 - passthrough to STLINK v2 connector # enable USART2 - passthrough to STLINK v2 connector
CONFIG_UART_STM32_PORT_1=y CONFIG_UART_STM32_PORT_2=y
CONFIG_UART_STM32_PORT_1_BAUD_RATE=115200 CONFIG_UART_STM32_PORT_2_BAUD_RATE=115200
# enable console on this port by default # enable console on this port by default
CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_1" CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_2"
# enable pinmux # enable pinmux
CONFIG_PINMUX=y CONFIG_PINMUX=y

6
boards/arm/olimexino_stm32/olimexino_stm32_defconfig
View file

@ -11,12 +11,12 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
CONFIG_SERIAL=y CONFIG_SERIAL=y
CONFIG_UART_STM32=y CONFIG_UART_STM32=y
# enable USART1 # enable USART1
CONFIG_UART_STM32_PORT_0=y CONFIG_UART_STM32_PORT_1=y
CONFIG_UART_STM32_PORT_0_BAUD_RATE=115200 CONFIG_UART_STM32_PORT_1_BAUD_RATE=115200
# enable console on this port by default # enable console on this port by default
CONFIG_CONSOLE=y CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y CONFIG_UART_CONSOLE=y
CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_0" CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_1"
# enable pinmux # enable pinmux

4
boards/arm/stm32_mini_a15/stm32_mini_a15_defconfig
View file

@ -10,8 +10,8 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
# enable uart driver # enable uart driver
CONFIG_SERIAL=y CONFIG_SERIAL=y
CONFIG_UART_STM32=y CONFIG_UART_STM32=y
CONFIG_UART_STM32_PORT_0=y CONFIG_UART_STM32_PORT_1=y
CONFIG_UART_STM32_PORT_0_BAUD_RATE=115200 CONFIG_UART_STM32_PORT_1_BAUD_RATE=115200
# enable pinmux # enable pinmux
CONFIG_PINMUX=y CONFIG_PINMUX=y

8
drivers/pinmux/stm32/pinmux_board_carbon.c
View file

@ -25,14 +25,14 @@
/* pin assignments for 96boards Carbon board */ /* pin assignments for 96boards Carbon board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#ifdef CONFIG_UART_STM32_PORT_0 #ifdef CONFIG_UART_STM32_PORT_1
{STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX},
#endif /* CONFIG_UART_STM32_PORT_0 */ #endif /* CONFIG_UART_STM32_PORT_1 */
#ifdef CONFIG_UART_STM32_PORT_1 #ifdef CONFIG_UART_STM32_PORT_2
{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
#endif /* CONFIG_UART_STM32_PORT_1 */ #endif /* CONFIG_UART_STM32_PORT_2 */
}; };
static int pinmux_stm32_init(struct device *port) static int pinmux_stm32_init(struct device *port)

12
drivers/pinmux/stm32/pinmux_board_nucleo_f103rb.c
View file

@ -25,18 +25,18 @@
/* pin assignments for NUCLEO-F103RB board */ /* pin assignments for NUCLEO-F103RB board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#ifdef CONFIG_UART_STM32_PORT_0 #ifdef CONFIG_UART_STM32_PORT_1
{STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX},
#endif /* CONFIG_UART_STM32_PORT_0 */
#ifdef CONFIG_UART_STM32_PORT_1
{STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX},
#endif /* CONFIG_UART_STM32_PORT_1 */ #endif /* CONFIG_UART_STM32_PORT_1 */
#ifdef CONFIG_UART_STM32_PORT_2 #ifdef CONFIG_UART_STM32_PORT_2
{STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX},
#endif /* CONFIG_UART_STM32_PORT_2 */
#ifdef CONFIG_UART_STM32_PORT_3
{STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX}, {STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX},
{STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX}, {STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX},
#endif /* CONFIG_UART_STM32_PORT_2 */ #endif /* CONFIG_UART_STM32_PORT_3 */
}; };
static int pinmux_stm32_init(struct device *port) static int pinmux_stm32_init(struct device *port)

8
drivers/pinmux/stm32/pinmux_board_nucleo_f401re.c
View file

@ -25,14 +25,14 @@
/* pin assignments for NUCLEO-F401RE board */ /* pin assignments for NUCLEO-F401RE board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#ifdef CONFIG_UART_STM32_PORT_0 #ifdef CONFIG_UART_STM32_PORT_1
{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX}, {STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX},
#endif /* CONFIG_UART_STM32_PORT_0 */ #endif /* CONFIG_UART_STM32_PORT_1 */
#ifdef CONFIG_UART_STM32_PORT_1 #ifdef CONFIG_UART_STM32_PORT_2
{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
#endif /* CONFIG_UART_STM32_PORT_1 */ #endif /* CONFIG_UART_STM32_PORT_2 */
}; };
static int pinmux_stm32_init(struct device *port) static int pinmux_stm32_init(struct device *port)

12
drivers/pinmux/stm32/pinmux_board_olimexino_stm32.c
View file

@ -25,18 +25,18 @@
/* pin assignments for NUCLEO-F103RB board */ /* pin assignments for NUCLEO-F103RB board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#ifdef CONFIG_UART_STM32_PORT_0 #ifdef CONFIG_UART_STM32_PORT_1
{STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX},
#endif /* CONFIG_UART_STM32_PORT_0 */ #endif /* CONFIG_UART_STM32_PORT_2 */
#ifdef CONFIG_UART_STM32_PORT_1 #ifdef CONFIG_UART_STM32_PORT_2
{STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX},
#endif /* CONFIG_UART_STM32_PORT_1 */ #endif /* CONFIG_UART_STM32_PORT_2 */
#ifdef CONFIG_UART_STM32_PORT_2 #ifdef CONFIG_UART_STM32_PORT_3
{STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX}, {STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX},
{STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX}, {STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX},
#endif /* CONFIG_UART_STM32_PORT_2 */ #endif /* CONFIG_UART_STM32_PORT_3 */
}; };
static int pinmux_stm32_init(struct device *port) static int pinmux_stm32_init(struct device *port)

12
drivers/pinmux/stm32/pinmux_board_stm32_mini_a15.c
View file

@ -25,18 +25,18 @@
/* pin assignments for STM32 MINI A15 board */ /* pin assignments for STM32 MINI A15 board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#ifdef CONFIG_UART_STM32_PORT_0 #ifdef CONFIG_UART_STM32_PORT_1
{STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX},
#endif /* CONFIG_UART_STM32_PORT_0 */
#ifdef CONFIG_UART_STM32_PORT_1
{STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX},
#endif /* CONFIG_UART_STM32_PORT_1 */ #endif /* CONFIG_UART_STM32_PORT_1 */
#ifdef CONFIG_UART_STM32_PORT_2 #ifdef CONFIG_UART_STM32_PORT_2
{STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX},
#endif /* CONFIG_UART_STM32_PORT_2 */
#ifdef CONFIG_UART_STM32_PORT_3
{STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX}, {STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX},
{STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX}, {STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX},
#endif /* CONFIG_UART_STM32_PORT_2 */ #endif /* CONFIG_UART_STM32_PORT_3 */
}; };
static int pinmux_stm32_init(struct device *port) static int pinmux_stm32_init(struct device *port)

94
drivers/serial/Kconfig.stm32
View file

@ -25,9 +25,9 @@ menuconfig UART_STM32
processors. Say y if you wish to use serial port on STM32F10x processors. Say y if you wish to use serial port on STM32F10x
MCU. MCU.
# --- port 0 --- # --- port 1 ---
config UART_STM32_PORT_0 config UART_STM32_PORT_1
bool "Enable STM32 USART1 Port" bool "Enable STM32 USART1 Port"
default n default n
depends on UART_STM32 depends on UART_STM32
@ -35,44 +35,12 @@ config UART_STM32_PORT_0
Enable support for USART1 port in the driver. Say y here Enable support for USART1 port in the driver. Say y here
if you want to use USART1 device. if you want to use USART1 device.
config UART_STM32_PORT_0_NAME
string "Device Name for STM32 USART1 Port"
default "UART_0"
depends on UART_STM32_PORT_0
help
This is the device name for USART1 port, and is
included in the device struct.
config UART_STM32_PORT_0_BAUD_RATE
int "STM32 USART1 Baud Rate"
default 9600
depends on UART_STM32_PORT_0
help
The baud rate for USART1 port to be set to at boot.
config UART_STM32_PORT_0_IRQ_PRI
int "STM32 USART1 Interrupt Priority"
default 0
depends on UART_STM32_PORT_0 && UART_INTERRUPT_DRIVEN
help
The interrupt priority for USART1 port.
# --- port 1 ---
config UART_STM32_PORT_1
bool "Enable STM32 USART2 Port"
default n
depends on UART_STM32
help
Enable support for USART2 port in the driver. Say y here
if you want to use USART2 device.
config UART_STM32_PORT_1_NAME config UART_STM32_PORT_1_NAME
string "Device Name for STM32 USART1 Port" string "Device Name for STM32 USART1 Port"
default "UART_1" default "UART_1"
depends on UART_STM32_PORT_1 depends on UART_STM32_PORT_1
help help
This is the device name for USART2 port, and is This is the device name for USART1 port, and is
included in the device struct. included in the device struct.
config UART_STM32_PORT_1_BAUD_RATE config UART_STM32_PORT_1_BAUD_RATE
@ -80,18 +48,50 @@ config UART_STM32_PORT_1_BAUD_RATE
default 9600 default 9600
depends on UART_STM32_PORT_1 depends on UART_STM32_PORT_1
help help
The baud rate for USART2 port to be set to at boot. The baud rate for USART1 port to be set to at boot.
config UART_STM32_PORT_1_IRQ_PRI config UART_STM32_PORT_1_IRQ_PRI
int "STM32 USART2 Interrupt Priority" int "STM32 USART1 Interrupt Priority"
default 0 default 0
depends on UART_STM32_PORT_1 && UART_INTERRUPT_DRIVEN depends on UART_STM32_PORT_1 && UART_INTERRUPT_DRIVEN
help help
The interrupt priority for USART2 port. The interrupt priority for USART1 port.
# --- port 2 --- # --- port 2 ---
config UART_STM32_PORT_2 config UART_STM32_PORT_2
bool "Enable STM32 USART2 Port"
default n
depends on UART_STM32
help
Enable support for USART2 port in the driver. Say y here
if you want to use USART2 device.
config UART_STM32_PORT_2_NAME
string "Device Name for STM32 USART2 Port"
default "UART_2"
depends on UART_STM32_PORT_2
help
This is the device name for USART2 port, and is
included in the device struct.
config UART_STM32_PORT_2_BAUD_RATE
int "STM32 USART2 Baud Rate"
default 9600
depends on UART_STM32_PORT_2
help
The baud rate for USART2 port to be set to at boot.
config UART_STM32_PORT_2_IRQ_PRI
int "STM32 USART2 Interrupt Priority"
default 0
depends on UART_STM32_PORT_2 && UART_INTERRUPT_DRIVEN
help
The interrupt priority for USART2 port.
# --- port 3 ---
config UART_STM32_PORT_3
bool "Enable STM32 USART3 Port" bool "Enable STM32 USART3 Port"
default n default n
depends on UART_STM32 depends on UART_STM32
@ -99,24 +99,24 @@ config UART_STM32_PORT_2
Enable support for USART3 port in the driver. Say y here Enable support for USART3 port in the driver. Say y here
if you want to use USART3 device. if you want to use USART3 device.
config UART_STM32_PORT_2_NAME config UART_STM32_PORT_3_NAME
string "Device Name for STM32 USART1 Port" string "Device Name for STM32 USART3 Port"
default "UART_2" default "UART_3"
depends on UART_STM32_PORT_2 depends on UART_STM32_PORT_3
help help
This is the device name for USART3 port, and is This is the device name for USART3 port, and is
included in the device struct. included in the device struct.
config UART_STM32_PORT_2_BAUD_RATE config UART_STM32_PORT_3_BAUD_RATE
int "STM32 USART1 Baud Rate" int "STM32 USART3 Baud Rate"
default 9600 default 9600
depends on UART_STM32_PORT_2 depends on UART_STM32_PORT_3
help help
The baud rate for USART3 port to be set to at boot. The baud rate for USART3 port to be set to at boot.
config UART_STM32_PORT_2_IRQ_PRI config UART_STM32_PORT_3_IRQ_PRI
int "STM32 USART3 Interrupt Priority" int "STM32 USART3 Interrupt Priority"
default 0 default 0
depends on UART_STM32_PORT_2 && UART_INTERRUPT_DRIVEN depends on UART_STM32_PORT_3 && UART_INTERRUPT_DRIVEN
help help
The interrupt priority for USART3 port. The interrupt priority for USART3 port.

127
drivers/serial/uart_stm32.c
View file

@ -319,57 +319,6 @@ static int uart_stm32_init(struct device *dev)
return 0; return 0;
} }
#ifdef CONFIG_UART_STM32_PORT_0
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void uart_stm32_irq_config_func_0(struct device *dev);
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
static const struct uart_stm32_config uart_stm32_dev_cfg_0 = {
.uconf = {
.base = (uint8_t *)USART1_BASE,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = uart_stm32_irq_config_func_0,
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
},
#ifdef CONFIG_SOC_SERIES_STM32F1X
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART1),
#elif CONFIG_SOC_SERIES_STM32F4X
.pclken = { .bus = STM32F4X_CLOCK_BUS_APB2,
.enr = STM32F4X_CLOCK_ENABLE_USART1 },
#endif /* CONFIG_SOC_SERIES_STM32FX */
};
static struct uart_stm32_data uart_stm32_dev_data_0 = {
.huart = {
.Init = {
.BaudRate = CONFIG_UART_STM32_PORT_0_BAUD_RATE} }
};
DEVICE_AND_API_INIT(uart_stm32_0, CONFIG_UART_STM32_PORT_0_NAME,
&uart_stm32_init,
&uart_stm32_dev_data_0, &uart_stm32_dev_cfg_0,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&uart_stm32_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void uart_stm32_irq_config_func_0(struct device *dev)
{
#ifdef CONFIG_SOC_SERIES_STM32F1X
#define PORT_0_IRQ STM32F1_IRQ_USART1
#elif CONFIG_SOC_SERIES_STM32F4X
#define PORT_0_IRQ STM32F4_IRQ_USART1
#endif
IRQ_CONNECT(PORT_0_IRQ,
CONFIG_UART_STM32_PORT_0_IRQ_PRI,
uart_stm32_isr, DEVICE_GET(uart_stm32_0),
0);
irq_enable(PORT_0_IRQ);
}
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
#endif /* CONFIG_UART_STM32_PORT_0 */
#ifdef CONFIG_UART_STM32_PORT_1 #ifdef CONFIG_UART_STM32_PORT_1
@ -379,16 +328,16 @@ static void uart_stm32_irq_config_func_1(struct device *dev);
static const struct uart_stm32_config uart_stm32_dev_cfg_1 = { static const struct uart_stm32_config uart_stm32_dev_cfg_1 = {
.uconf = { .uconf = {
.base = (uint8_t *)USART2_BASE, .base = (uint8_t *)USART1_BASE,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = uart_stm32_irq_config_func_1, .irq_config_func = uart_stm32_irq_config_func_1,
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ #endif /* CONFIG_UART_INTERRUPT_DRIVEN */
}, },
#ifdef CONFIG_SOC_SERIES_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART2), .clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART1),
#elif CONFIG_SOC_SERIES_STM32F4X #elif CONFIG_SOC_SERIES_STM32F4X
.pclken = { .bus = STM32F4X_CLOCK_BUS_APB1, .pclken = { .bus = STM32F4X_CLOCK_BUS_APB2,
.enr = STM32F4X_CLOCK_ENABLE_USART2 }, .enr = STM32F4X_CLOCK_ENABLE_USART1 },
#endif /* CONFIG_SOC_SERIES_STM32FX */ #endif /* CONFIG_SOC_SERIES_STM32FX */
}; };
@ -408,9 +357,9 @@ DEVICE_AND_API_INIT(uart_stm32_1, CONFIG_UART_STM32_PORT_1_NAME,
static void uart_stm32_irq_config_func_1(struct device *dev) static void uart_stm32_irq_config_func_1(struct device *dev)
{ {
#ifdef CONFIG_SOC_SERIES_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
#define PORT_1_IRQ STM32F1_IRQ_USART2 #define PORT_1_IRQ STM32F1_IRQ_USART1
#elif CONFIG_SOC_SERIES_STM32F4X #elif CONFIG_SOC_SERIES_STM32F4X
#define PORT_1_IRQ STM32F4_IRQ_USART2 #define PORT_1_IRQ STM32F4_IRQ_USART1
#endif #endif
IRQ_CONNECT(PORT_1_IRQ, IRQ_CONNECT(PORT_1_IRQ,
CONFIG_UART_STM32_PORT_1_IRQ_PRI, CONFIG_UART_STM32_PORT_1_IRQ_PRI,
@ -431,16 +380,17 @@ static void uart_stm32_irq_config_func_2(struct device *dev);
static const struct uart_stm32_config uart_stm32_dev_cfg_2 = { static const struct uart_stm32_config uart_stm32_dev_cfg_2 = {
.uconf = { .uconf = {
.base = (uint8_t *)USART3_BASE, .base = (uint8_t *)USART2_BASE,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = uart_stm32_irq_config_func_2, .irq_config_func = uart_stm32_irq_config_func_2,
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ #endif /* CONFIG_UART_INTERRUPT_DRIVEN */
}, },
#ifdef CONFIG_SOC_SERIES_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART3), .clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART2),
#elif CONFIG_SOC_SERIES_STM32F4X #elif CONFIG_SOC_SERIES_STM32F4X
.clock_subsys = UINT_TO_POINTER(STM32F40X_CLOCK_SUBSYS_USART3), .pclken = { .bus = STM32F4X_CLOCK_BUS_APB1,
#endif /* CONFIG_SOC_SERIES_STM32F4X */ .enr = STM32F4X_CLOCK_ENABLE_USART2 },
#endif /* CONFIG_SOC_SERIES_STM32FX */
}; };
static struct uart_stm32_data uart_stm32_dev_data_2 = { static struct uart_stm32_data uart_stm32_dev_data_2 = {
@ -459,9 +409,9 @@ DEVICE_AND_API_INIT(uart_stm32_2, CONFIG_UART_STM32_PORT_2_NAME,
static void uart_stm32_irq_config_func_2(struct device *dev) static void uart_stm32_irq_config_func_2(struct device *dev)
{ {
#ifdef CONFIG_SOC_SERIES_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
#define PORT_2_IRQ STM32F1_IRQ_USART3 #define PORT_2_IRQ STM32F1_IRQ_USART2
#elif CONFIG_SOC_SERIES_STM32F4X #elif CONFIG_SOC_SERIES_STM32F4X
#define PORT_2_IRQ STM32F4_IRQ_USART3 #define PORT_2_IRQ STM32F4_IRQ_USART2
#endif #endif
IRQ_CONNECT(PORT_2_IRQ, IRQ_CONNECT(PORT_2_IRQ,
CONFIG_UART_STM32_PORT_2_IRQ_PRI, CONFIG_UART_STM32_PORT_2_IRQ_PRI,
@ -472,3 +422,54 @@ static void uart_stm32_irq_config_func_2(struct device *dev)
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ #endif /* CONFIG_UART_INTERRUPT_DRIVEN */
#endif /* CONFIG_UART_STM32_PORT_2 */ #endif /* CONFIG_UART_STM32_PORT_2 */
#ifdef CONFIG_UART_STM32_PORT_3
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void uart_stm32_irq_config_func_3(struct device *dev);
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
static const struct uart_stm32_config uart_stm32_dev_cfg_3 = {
.uconf = {
.base = (uint8_t *)USART3_BASE,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = uart_stm32_irq_config_func_3,
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
},
#ifdef CONFIG_SOC_SERIES_STM32F1X
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART3),
#elif CONFIG_SOC_SERIES_STM32F4X
.clock_subsys = UINT_TO_POINTER(STM32F40X_CLOCK_SUBSYS_USART3),
#endif /* CONFIG_SOC_SERIES_STM32F4X */
};
static struct uart_stm32_data uart_stm32_dev_data_3 = {
.huart = {
.Init = {
.BaudRate = CONFIG_UART_STM32_PORT_3_BAUD_RATE} }
};
DEVICE_AND_API_INIT(uart_stm32_3, CONFIG_UART_STM32_PORT_3_NAME,
&uart_stm32_init,
&uart_stm32_dev_data_3, &uart_stm32_dev_cfg_3,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&uart_stm32_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void uart_stm32_irq_config_func_3(struct device *dev)
{
#ifdef CONFIG_SOC_SERIES_STM32F1X
#define PORT_3_IRQ STM32F1_IRQ_USART3
#elif CONFIG_SOC_SERIES_STM32F4X
#define PORT_3_IRQ STM32F4_IRQ_USART3
#endif
IRQ_CONNECT(PORT_3_IRQ,
CONFIG_UART_STM32_PORT_3_IRQ_PRI,
uart_stm32_isr, DEVICE_GET(uart_stm32_3),
0);
irq_enable(PORT_3_IRQ);
}
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
#endif /* CONFIG_UART_STM32_PORT_3 */