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soc: stm32wl: add power management support

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This adds power management support for the STM32WL series.

Suspend-to-idle is mapped to the three stop states (wake up from any
EXTI, including LPTIM), and soft-off can trigger either standby or
shutdown (wake up in reset).

Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
This commit is contained in:
Fabio Baltieri 2021-05-16 18:20:23 +01:00 • committed by Anas Nashif
commit 2fc87f961b
3 changed files with 119 additions and 0 deletions
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4
soc/arm/st_stm32/stm32wl/CMakeLists.txt
View file

@ -2,3 +2,7 @@
zephyr_include_directories(${ZEPHYR_BASE}/drivers)
zephyr_sources(soc.c)
zephyr_sources_ifdef(CONFIG_PM
power.c
)

8
soc/arm/st_stm32/stm32wl/Kconfig.defconfig.series
View file

@ -10,4 +10,12 @@ source "soc/arm/st_stm32/stm32wl/Kconfig.defconfig.stm32wl*"
config SOC_SERIES
default "stm32wl"
if PM
config PM_DEVICE
default y
config STM32_LPTIM_TIMER
default y
endif # PM
endif # SOC_SERIES_STM32WLX

107
soc/arm/st_stm32/stm32wl/power.c Normal file
View file

@ -0,0 +1,107 @@
/*
* Copyright (c) 2021 Fabio Baltieri
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr.h>
#include <pm/pm.h>
#include <soc.h>
#include <init.h>
#include <stm32wlxx_ll_utils.h>
#include <stm32wlxx_ll_bus.h>
#include <stm32wlxx_ll_cortex.h>
#include <stm32wlxx_ll_pwr.h>
#include <stm32wlxx_ll_rcc.h>
#include <stm32wlxx_ll_system.h>
#include <clock_control/clock_stm32_ll_common.h>
#include <logging/log.h>
LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
/* Invoke Low Power/System Off specific Tasks */
void pm_power_state_set(struct pm_state_info info)
{
switch (info.state) {
case PM_STATE_SUSPEND_TO_IDLE:
LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);
LL_PWR_ClearFlag_WU();
switch (info.substate_id) {
case 1:
LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0);
break;
case 2:
LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1);
break;
case 3:
LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2);
break;
default:
LOG_DBG("Unsupported power substate-id %u", info.substate_id);
return;
}
LL_LPM_EnableDeepSleep();
k_cpu_idle();
break;
case PM_STATE_SOFT_OFF:
LL_PWR_ClearFlag_WU();
switch (info.substate_id) {
case 0:
LL_PWR_SetPowerMode(LL_PWR_MODE_STANDBY);
break;
case 1:
LL_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN);
break;
default:
LOG_DBG("Unsupported power substate-id %u", info.substate_id);
return;
}
LL_LPM_EnableDeepSleep();
k_cpu_idle();
break;
default:
LOG_DBG("Unsupported power state %u", info.state);
break;
}
}
/* Handle SOC specific activity after Low Power Mode Exit */
void pm_power_state_exit_post_ops(struct pm_state_info info)
{
switch (info.state) {
case PM_STATE_SUSPEND_TO_IDLE:
LL_LPM_DisableSleepOnExit();
LL_LPM_EnableSleep();
/* need to restore the clock */
stm32_clock_control_init(NULL);
break;
case PM_STATE_SOFT_OFF:
/* Nothing to do. */
break;
default:
LOG_DBG("Unsupported power substate-id %u", info.state);
break;
}
/*
* System is now in active mode.
* Reenable interrupts which were disabled
* when OS started idling code.
*/
irq_unlock(0);
}
/* Initialize STM32 Power */
static int stm32_power_init(const struct device *dev)
{
ARG_UNUSED(dev);
#ifdef CONFIG_DEBUG
/* Enable the Debug Module during STOP mode */
LL_DBGMCU_EnableDBGStopMode();
#endif /* CONFIG_DEBUG */
return 0;
}
SYS_INIT(stm32_power_init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);