drivers/sensors: Switch lis2dh driver to new SPI API
Replacing legacy API calls by news ones. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka
Carles Cufí
parent
94d7c9f23e
commit
2f7e6b6d42
4 changed files with 127 additions and 107 deletions
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@ -10,7 +10,6 @@ menuconfig LIS2DH
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bool
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prompt "LIS2DH Three Axis Accelerometer"
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depends on I2C || SPI
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select SPI_LEGACY_API
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default n
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help
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Enable driver for LIS2DH SPI/I2C-based triaxial accelerometer sensor.
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@ -10,8 +10,40 @@
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#include <misc/byteorder.h>
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#include <misc/__assert.h>
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#if defined(CONFIG_LIS2DH_BUS_SPI)
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int lis2dh_spi_access(struct lis2dh_data *ctx, u8_t cmd,
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void *data, size_t length)
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{
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const struct spi_buf buf[2] = {
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{
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.buf = &cmd,
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.len = 1
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},
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{
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.buf = data,
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.len = length
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}
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};
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const struct spi_buf_set tx = {
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.buffers = buf,
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.count = 2
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};
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if (cmd & LIS2DH_SPI_READ_BIT) {
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const struct spi_buf_set rx = {
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.buffers = buf,
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.count = 2
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};
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return spi_transceive(ctx->spi, &ctx->spi_cfg, &tx, &rx);
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}
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return spi_write(ctx->spi, &ctx->spi_cfg, &tx);
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}
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#endif
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#if defined(CONFIG_LIS2DH_TRIGGER) || defined(CONFIG_LIS2DH_ACCEL_RANGE_RUNTIME)
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int lis2dh_reg_field_update(struct device *bus, u8_t reg_addr,
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int lis2dh_reg_field_update(struct device *dev, u8_t reg_addr,
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u8_t pos, u8_t mask, u8_t val)
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{
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int status;
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@ -20,12 +52,12 @@ int lis2dh_reg_field_update(struct device *bus, u8_t reg_addr,
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/* just to remove gcc warning */
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old_val = 0;
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status = lis2dh_reg_read_byte(bus, reg_addr, &old_val);
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status = lis2dh_reg_read_byte(dev, reg_addr, &old_val);
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if (status < 0) {
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return status;
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}
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return lis2dh_reg_write_byte(bus, reg_addr,
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return lis2dh_reg_write_byte(dev, reg_addr,
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(old_val & ~mask) | ((val << pos) & mask));
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}
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#endif
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@ -98,7 +130,7 @@ static int lis2dh_sample_fetch(struct device *dev, enum sensor_channel chan)
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* since status and all accel data register addresses are consecutive,
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* a burst read can be used to read all the samples
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*/
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status = lis2dh_burst_read(lis2dh->bus, LIS2DH_REG_STATUS,
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status = lis2dh_burst_read(dev, LIS2DH_REG_STATUS,
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lis2dh->sample.raw,
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sizeof(lis2dh->sample.raw));
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if (status < 0) {
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@ -161,7 +193,7 @@ static int lis2dh_acc_odr_set(struct device *dev, u16_t freq)
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return odr;
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}
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status = lis2dh_reg_read_byte(lis2dh->bus, LIS2DH_REG_CTRL1, &value);
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status = lis2dh_reg_read_byte(dev, LIS2DH_REG_CTRL1, &value);
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if (status < 0) {
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return status;
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}
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@ -176,7 +208,7 @@ static int lis2dh_acc_odr_set(struct device *dev, u16_t freq)
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odr--;
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}
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return lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_CTRL1,
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return lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL1,
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(value & ~LIS2DH_ODR_MASK) |
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LIS2DH_ODR_RATE(odr));
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}
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@ -216,7 +248,7 @@ static int lis2dh_acc_range_set(struct device *dev, s32_t range)
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lis2dh->scale = LIS2DH_ACCEL_SCALE(range);
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return lis2dh_reg_field_update(lis2dh->bus, LIS2DH_REG_CTRL4,
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return lis2dh_reg_field_update(dev, LIS2DH_REG_CTRL4,
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LIS2DH_FS_SHIFT,
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LIS2DH_FS_MASK,
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fs);
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@ -282,17 +314,8 @@ int lis2dh_init(struct device *dev)
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int status;
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u8_t raw[LIS2DH_DATA_OFS + 6];
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lis2dh->bus = device_get_binding(LIS2DH_BUS_DEV_NAME);
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if (lis2dh->bus == NULL) {
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SYS_LOG_ERR("Could not get pointer to %s device",
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LIS2DH_BUS_DEV_NAME);
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return -EINVAL;
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}
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/* configure bus, e.g. spi clock and format */
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status = lis2dh_bus_configure(lis2dh->bus);
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status = lis2dh_bus_configure(dev);
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if (status < 0) {
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SYS_LOG_ERR("Failed to configure bus (spi, i2c)");
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return status;
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}
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@ -304,7 +327,7 @@ int lis2dh_init(struct device *dev)
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memset(raw, 0, sizeof(raw));
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raw[LIS2DH_DATA_OFS] = LIS2DH_ACCEL_EN_BITS;
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status = lis2dh_burst_write(lis2dh->bus, LIS2DH_REG_CTRL1, raw,
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status = lis2dh_burst_write(dev, LIS2DH_REG_CTRL1, raw,
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sizeof(raw));
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if (status < 0) {
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SYS_LOG_ERR("Failed to reset ctrl registers.");
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@ -313,7 +336,7 @@ int lis2dh_init(struct device *dev)
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/* set full scale range and store it for later conversion */
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lis2dh->scale = LIS2DH_ACCEL_SCALE(1 << (LIS2DH_FS_IDX + 1));
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status = lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_CTRL4,
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status = lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL4,
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LIS2DH_FS_BITS);
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if (status < 0) {
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SYS_LOG_ERR("Failed to set full scale ctrl register.");
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@ -333,7 +356,7 @@ int lis2dh_init(struct device *dev)
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LIS2DH_ODR_IDX, (u8_t)LIS2DH_LP_EN_BIT, lis2dh->scale);
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/* enable accel measurements and set power mode and data rate */
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return lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_CTRL1,
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return lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL1,
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LIS2DH_ACCEL_EN_BITS | LIS2DH_LP_EN_BIT |
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LIS2DH_ODR_BITS);
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}
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@ -25,7 +25,7 @@
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#define LIS2DH_SPI_ADDR_MASK BIT_MASK(6)
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/* LIS2DH supports only SPI mode 0, word size 8 bits, MSB first */
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#define LIS2DH_SPI_CFG 0x80
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#define LIS2DH_SPI_CFG SPI_WORD_SET(8)
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#define LIS2DH_BUS_DEV_NAME CONFIG_LIS2DH_SPI_MASTER_DEV_NAME
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@ -184,8 +184,12 @@ union lis2dh_sample {
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};
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struct lis2dh_data {
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#if defined(CONFIG_LIS2DH_BUS_SPI)
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struct device *spi;
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struct spi_config spi_cfg;
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#else
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struct device *bus;
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#endif
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union lis2dh_sample sample;
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/* current scaling factor, in micro m/s^2 / lsb */
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u16_t scale;
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@ -216,49 +220,40 @@ struct lis2dh_data {
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#define SYS_LOG_LEVEL CONFIG_SYS_LOG_SENSOR_LEVEL
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#include <logging/sys_log.h>
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static inline int lis2dh_burst_read(struct device *bus, u8_t start_addr,
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#if defined(CONFIG_LIS2DH_BUS_SPI)
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int lis2dh_spi_access(struct lis2dh_data *ctx, u8_t cmd,
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void *data, size_t length);
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#endif
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static inline int lis2dh_burst_read(struct device *dev, u8_t start_addr,
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u8_t *buf, u8_t num_bytes)
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{
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struct lis2dh_data *lis2dh = dev->driver_data;
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#if defined(CONFIG_LIS2DH_BUS_SPI)
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int status;
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u8_t tx_buf = LIS2DH_SPI_READ_BIT | LIS2DH_SPI_AUTOINC_ADDR |
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start_addr;
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start_addr |= LIS2DH_SPI_READ_BIT | LIS2DH_SPI_AUTOINC_ADDR;
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status = spi_slave_select(bus, LIS2DH_BUS_ADDRESS);
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status = spi_transceive(bus, &tx_buf, 1, buf, num_bytes);
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SYS_LOG_DBG("tx=0x%x num=0x%x, status=%d", tx_buf,
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num_bytes, status);
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return status;
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return lis2dh_spi_access(lis2dh, start_addr, buf, num_bytes);
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#elif defined(CONFIG_LIS2DH_BUS_I2C)
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return i2c_burst_read(bus, LIS2DH_BUS_ADDRESS, start_addr, buf,
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num_bytes);
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return i2c_burst_read(lis2dh->bus, LIS2DH_BUS_ADDRESS, start_addr,
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buf, num_bytes);
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#else
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return -ENODEV;
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#endif
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}
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static inline int lis2dh_reg_read_byte(struct device *bus, u8_t reg_addr,
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static inline int lis2dh_reg_read_byte(struct device *dev, u8_t reg_addr,
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u8_t *value)
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{
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struct lis2dh_data *lis2dh = dev->driver_data;
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#if defined(CONFIG_LIS2DH_BUS_SPI)
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int status;
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u8_t tx_buf = LIS2DH_SPI_READ_BIT | reg_addr;
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u8_t rx_buf[2];
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reg_addr |= LIS2DH_SPI_READ_BIT;
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status = spi_slave_select(bus, LIS2DH_BUS_ADDRESS);
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status = spi_transceive(bus, &tx_buf, 1, rx_buf, 2);
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if (status == 0) {
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*value = rx_buf[1];
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}
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SYS_LOG_DBG("tx=0x%x rx1=0x%x", tx_buf, rx_buf[1]);
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return status;
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return lis2dh_spi_access(lis2dh, reg_addr, value, 1);
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#elif defined(CONFIG_LIS2DH_BUS_I2C)
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return i2c_reg_read_byte(bus, LIS2DH_BUS_ADDRESS, reg_addr, value);
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return i2c_reg_read_byte(lis2dh->bus, LIS2DH_BUS_ADDRESS,
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reg_addr, value);
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#else
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return -ENODEV;
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#endif
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@ -267,58 +262,64 @@ static inline int lis2dh_reg_read_byte(struct device *bus, u8_t reg_addr,
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static inline int lis2dh_burst_write(struct device *bus, u8_t start_addr,
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u8_t *buf, u8_t num_bytes)
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{
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struct lis2dh_data *lis2dh = dev->driver_data;
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#if defined(CONFIG_LIS2DH_BUS_SPI)
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int status;
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u8_t dummy;
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start_addr |= LIS2DH_SPI_AUTOINC_ADDR;
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buf[0] = LIS2DH_SPI_AUTOINC_ADDR | start_addr;
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status = spi_slave_select(bus, LIS2DH_BUS_ADDRESS);
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status = spi_transceive(bus, buf, num_bytes, &dummy, 0);
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SYS_LOG_DBG("tx=0x%x num=0x%x, status=%d", buf[0],
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num_bytes, status);
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return status;
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return lis2dh_spi_access(lis2dh, start_addr, buf, num_bytes);
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#elif defined(CONFIG_LIS2DH_BUS_I2C)
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return i2c_burst_write(bus, LIS2DH_BUS_ADDRESS, start_addr, buf,
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num_bytes);
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return i2c_burst_write(lis2dh->bus, LIS2DH_BUS_ADDRESS, start_addr,
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buf, num_bytes);
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#else
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return -ENODEV;
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#endif
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}
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static inline int lis2dh_reg_write_byte(struct device *bus, u8_t reg_addr,
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static inline int lis2dh_reg_write_byte(struct device *dev, u8_t reg_addr,
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u8_t value)
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{
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struct lis2dh_data *lis2dh = dev->driver_data;
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#if defined(CONFIG_LIS2DH_BUS_SPI)
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u8_t tx_buf[2] = { reg_addr & LIS2DH_SPI_ADDR_MASK, value };
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u8_t dummy;
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reg_addr &= LIS2DH_SPI_ADDR_MASK;
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spi_slave_select(bus, LIS2DH_BUS_ADDRESS);
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SYS_LOG_DBG("tx0=0x%x tx1=0x%x", tx_buf[0], tx_buf[1]);
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return spi_transceive(bus, tx_buf, 2, &dummy, 0);
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return lis2dh_spi_access(lis2dh, reg_addr, &value, 1);
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#elif defined(CONFIG_LIS2DH_BUS_I2C)
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u8_t tx_buf[2] = {reg_addr, value};
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return i2c_write(bus, tx_buf, sizeof(tx_buf), LIS2DH_BUS_ADDRESS);
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return i2c_write(lis2dh->bus, tx_buf, sizeof(tx_buf),
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LIS2DH_BUS_ADDRESS);
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#else
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return -ENODEV;
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#endif
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}
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static inline int lis2dh_bus_configure(struct device *bus)
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static inline int lis2dh_bus_configure(struct device *dev)
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{
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#if defined(CONFIG_LIS2DH_BUS_SPI)
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struct spi_config config = {
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.config = LIS2DH_SPI_CFG,
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.max_sys_freq = CONFIG_LIS2DH_SPI_FREQUENCY,
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};
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struct lis2dh_data *lis2dh = dev->driver_data;
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return spi_configure(bus, &config);
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#if defined(CONFIG_LIS2DH_BUS_SPI)
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lis2dh->spi = device_get_binding(LIS2DH_BUS_DEV_NAME);
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if (lis2dh->spi == NULL) {
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SYS_LOG_ERR("Could not get pointer to %s device",
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LIS2DH_BUS_DEV_NAME);
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return -EINVAL;
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}
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lis2dh->spi_cfg.operation = LIS2DH_SPI_CFG;
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lis2dh->spi_cfg.frequency = CONFIG_LIS2DH_SPI_FREQUENCY;
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lis2dh->spi_cfg.slave = LIS2DH_BUS_ADDRESS;
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return 0;
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#elif defined(CONFIG_LIS2DH_BUS_I2C)
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lis2dh->bus = device_get_binding(LIS2DH_BUS_DEV_NAME);
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if (lis2dh->bus == NULL) {
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SYS_LOG_ERR("Could not get pointer to %s device",
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LIS2DH_BUS_DEV_NAME);
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return -EINVAL;
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}
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return 0;
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#else
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return -ENODEV;
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@ -332,7 +333,7 @@ int lis2dh_trigger_set(struct device *dev,
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int lis2dh_init_interrupt(struct device *dev);
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int lis2dh_reg_field_update(struct device *bus, u8_t reg_addr,
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int lis2dh_reg_field_update(struct device *dev, u8_t reg_addr,
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u8_t pos, u8_t mask, u8_t val);
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int lis2dh_acc_slope_config(struct device *dev, enum sensor_attribute attr,
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@ -25,7 +25,7 @@ static int lis2dh_trigger_drdy_set(struct device *dev, enum sensor_channel chan,
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/* cancel potentially pending trigger */
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atomic_clear_bit(&lis2dh->trig_flags, TRIGGED_INT1);
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status = lis2dh_reg_field_update(lis2dh->bus, LIS2DH_REG_CTRL3,
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status = lis2dh_reg_field_update(dev, LIS2DH_REG_CTRL3,
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LIS2DH_EN_DRDY1_INT1_SHIFT,
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LIS2DH_EN_DRDY1_INT1, 0);
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@ -49,18 +49,19 @@ static int lis2dh_trigger_drdy_set(struct device *dev, enum sensor_channel chan,
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return 0;
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}
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static int lis2dh_start_trigger_int1(const struct lis2dh_data *lis2dh)
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static int lis2dh_start_trigger_int1(struct device *dev)
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{
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struct lis2dh_data *lis2dh = dev->driver_data;
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int status;
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u8_t raw[LIS2DH_BUF_SZ];
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u8_t ctrl1 = 0;
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/* power down temporarly to align interrupt & data output sampling */
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status = lis2dh_reg_read_byte(lis2dh->bus, LIS2DH_REG_CTRL1, &ctrl1);
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status = lis2dh_reg_read_byte(dev, LIS2DH_REG_CTRL1, &ctrl1);
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if (unlikely(status < 0)) {
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return status;
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}
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status = lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_CTRL1,
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status = lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL1,
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ctrl1 & ~LIS2DH_ODR_MASK);
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if (unlikely(status < 0)) {
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return status;
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@ -69,8 +70,7 @@ static int lis2dh_start_trigger_int1(const struct lis2dh_data *lis2dh)
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SYS_LOG_DBG("ctrl1=0x%x @tick=%u", ctrl1, k_cycle_get_32());
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/* empty output data */
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status = lis2dh_burst_read(lis2dh->bus, LIS2DH_REG_STATUS, raw,
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sizeof(raw));
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status = lis2dh_burst_read(dev, LIS2DH_REG_STATUS, raw, sizeof(raw));
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if (unlikely(status < 0)) {
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return status;
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}
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@ -78,12 +78,12 @@ static int lis2dh_start_trigger_int1(const struct lis2dh_data *lis2dh)
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gpio_pin_enable_callback(lis2dh->gpio, CONFIG_LIS2DH_INT1_GPIO_PIN);
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/* re-enable output sampling */
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status = lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_CTRL1, ctrl1);
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status = lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL1, ctrl1);
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if (unlikely(status < 0)) {
|
||||
return status;
|
||||
}
|
||||
|
||||
return lis2dh_reg_field_update(lis2dh->bus, LIS2DH_REG_CTRL3,
|
||||
return lis2dh_reg_field_update(dev, LIS2DH_REG_CTRL3,
|
||||
LIS2DH_EN_DRDY1_INT1_SHIFT,
|
||||
LIS2DH_EN_DRDY1_INT1, 1);
|
||||
}
|
||||
|
|
@ -104,11 +104,10 @@ static int lis2dh_trigger_anym_set(struct device *dev,
|
|||
atomic_clear_bit(&lis2dh->trig_flags, TRIGGED_INT2);
|
||||
|
||||
/* disable all interrupt 2 events */
|
||||
status = lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_INT2_CFG, 0);
|
||||
status = lis2dh_reg_write_byte(dev, LIS2DH_REG_INT2_CFG, 0);
|
||||
|
||||
/* make sure any pending interrupt is cleared */
|
||||
status = lis2dh_reg_read_byte(lis2dh->bus, LIS2DH_REG_INT2_SRC,
|
||||
®_val);
|
||||
status = lis2dh_reg_read_byte(dev, LIS2DH_REG_INT2_SRC, ®_val);
|
||||
|
||||
lis2dh->handler_anymotion = handler;
|
||||
if ((handler == NULL) || (status < 0)) {
|
||||
|
|
@ -127,8 +126,9 @@ static int lis2dh_trigger_anym_set(struct device *dev,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int lis2dh_start_trigger_int2(const struct lis2dh_data *lis2dh)
|
||||
static int lis2dh_start_trigger_int2(struct device *dev)
|
||||
{
|
||||
struct lis2dh_data *lis2dh = dev->driver_data;
|
||||
int status;
|
||||
|
||||
status = gpio_pin_enable_callback(lis2dh->gpio,
|
||||
|
|
@ -137,7 +137,7 @@ static int lis2dh_start_trigger_int2(const struct lis2dh_data *lis2dh)
|
|||
SYS_LOG_ERR("enable callback failed err=%d", status);
|
||||
}
|
||||
|
||||
return lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_INT2_CFG,
|
||||
return lis2dh_reg_write_byte(dev, LIS2DH_REG_INT2_CFG,
|
||||
LIS2DH_ANYM_CFG);
|
||||
}
|
||||
|
||||
|
|
@ -165,8 +165,7 @@ int lis2dh_acc_slope_config(struct device *dev, enum sensor_attribute attr,
|
|||
u8_t range_g, reg_val;
|
||||
u32_t slope_th_ums2;
|
||||
|
||||
status = lis2dh_reg_read_byte(lis2dh->bus, LIS2DH_REG_CTRL4,
|
||||
®_val);
|
||||
status = lis2dh_reg_read_byte(dev, LIS2DH_REG_CTRL4, ®_val);
|
||||
if (status < 0) {
|
||||
return status;
|
||||
}
|
||||
|
|
@ -188,7 +187,7 @@ int lis2dh_acc_slope_config(struct device *dev, enum sensor_attribute attr,
|
|||
SYS_LOG_INF("int2_ths=0x%x range_g=%d ums2=%u", reg_val,
|
||||
range_g, slope_th_ums2 - 1);
|
||||
|
||||
status = lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_INT2_THS,
|
||||
status = lis2dh_reg_write_byte(dev, LIS2DH_REG_INT2_THS,
|
||||
reg_val);
|
||||
} else { /* SENSOR_ATTR_SLOPE_DUR */
|
||||
/*
|
||||
|
|
@ -201,7 +200,7 @@ int lis2dh_acc_slope_config(struct device *dev, enum sensor_attribute attr,
|
|||
|
||||
SYS_LOG_INF("int2_dur=0x%x", val->val1);
|
||||
|
||||
status = lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_INT2_DUR,
|
||||
status = lis2dh_reg_write_byte(dev, LIS2DH_REG_INT2_DUR,
|
||||
val->val1);
|
||||
}
|
||||
|
||||
|
|
@ -249,7 +248,7 @@ static void lis2dh_thread_cb(void *arg)
|
|||
|
||||
if (unlikely(atomic_test_and_clear_bit(&lis2dh->trig_flags,
|
||||
START_TRIG_INT1))) {
|
||||
int status = lis2dh_start_trigger_int1(lis2dh);
|
||||
int status = lis2dh_start_trigger_int1(dev);
|
||||
|
||||
if (unlikely(status < 0)) {
|
||||
SYS_LOG_ERR("lis2dh_start_trigger_int1: %d", status);
|
||||
|
|
@ -259,7 +258,7 @@ static void lis2dh_thread_cb(void *arg)
|
|||
|
||||
if (unlikely(atomic_test_and_clear_bit(&lis2dh->trig_flags,
|
||||
START_TRIG_INT2))) {
|
||||
int status = lis2dh_start_trigger_int2(lis2dh);
|
||||
int status = lis2dh_start_trigger_int2(dev);
|
||||
|
||||
if (unlikely(status < 0)) {
|
||||
SYS_LOG_ERR("lis2dh_start_trigger_int2: %d", status);
|
||||
|
|
@ -290,8 +289,7 @@ static void lis2dh_thread_cb(void *arg)
|
|||
u8_t reg_val;
|
||||
|
||||
/* clear interrupt 2 to de-assert int2 line */
|
||||
lis2dh_reg_read_byte(lis2dh->bus, LIS2DH_REG_INT2_SRC,
|
||||
®_val);
|
||||
lis2dh_reg_read_byte(dev, LIS2DH_REG_INT2_SRC, ®_val);
|
||||
|
||||
if (likely(lis2dh->handler_anymotion != NULL)) {
|
||||
lis2dh->handler_anymotion(dev, &anym_trigger);
|
||||
|
|
@ -401,7 +399,7 @@ int lis2dh_init_interrupt(struct device *dev)
|
|||
lis2dh->dev = dev;
|
||||
#endif
|
||||
/* disable interrupt 2 in case of warm (re)boot */
|
||||
status = lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_INT2_CFG, 0);
|
||||
status = lis2dh_reg_write_byte(dev, LIS2DH_REG_INT2_CFG, 0);
|
||||
if (status < 0) {
|
||||
SYS_LOG_ERR("Interrupt 2 disable reg write failed (%d)",
|
||||
status);
|
||||
|
|
@ -409,15 +407,14 @@ int lis2dh_init_interrupt(struct device *dev)
|
|||
}
|
||||
|
||||
memset(raw, 0, sizeof(raw));
|
||||
status = lis2dh_burst_write(lis2dh->bus, LIS2DH_REG_INT2_THS, raw,
|
||||
sizeof(raw));
|
||||
status = lis2dh_burst_write(dev, LIS2DH_REG_INT2_THS, raw, sizeof(raw));
|
||||
if (status < 0) {
|
||||
SYS_LOG_ERR("Burst write to INT2 THS failed (%d)", status);
|
||||
return status;
|
||||
}
|
||||
|
||||
/* latch int2 line interrupt */
|
||||
status = lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_CTRL5,
|
||||
status = lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL5,
|
||||
LIS2DH_EN_LIR_INT2);
|
||||
if (status < 0) {
|
||||
SYS_LOG_ERR("INT2 latch enable reg write failed (%d)", status);
|
||||
|
|
@ -429,6 +426,6 @@ int lis2dh_init_interrupt(struct device *dev)
|
|||
CONFIG_LIS2DH_INT2_GPIO_PIN, LIS2DH_INT2_CFG);
|
||||
|
||||
/* enable interrupt 2 on int2 line */
|
||||
return lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_CTRL6,
|
||||
return lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL6,
|
||||
LIS2DH_EN_INT2_INT2);
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue