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drivers/sensors: Switch lis2dh driver to new SPI API

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Replacing legacy API calls by news ones.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka 2018-01-30 21:18:52 +01:00 • committed by Carles Cufí
commit 2f7e6b6d42
4 changed files with 127 additions and 107 deletions
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1
drivers/sensor/lis2dh/Kconfig
View file

@ -10,7 +10,6 @@ menuconfig LIS2DH
bool bool
prompt "LIS2DH Three Axis Accelerometer" prompt "LIS2DH Three Axis Accelerometer"
depends on I2C || SPI depends on I2C || SPI
select SPI_LEGACY_API
default n default n
help help
Enable driver for LIS2DH SPI/I2C-based triaxial accelerometer sensor. Enable driver for LIS2DH SPI/I2C-based triaxial accelerometer sensor.

63
drivers/sensor/lis2dh/lis2dh.c
View file

@ -10,8 +10,40 @@
#include <misc/byteorder.h> #include <misc/byteorder.h>
#include <misc/__assert.h> #include <misc/__assert.h>
#if defined(CONFIG_LIS2DH_BUS_SPI)
int lis2dh_spi_access(struct lis2dh_data *ctx, u8_t cmd,
void *data, size_t length)
{
const struct spi_buf buf[2] = {
{
.buf = &cmd,
.len = 1
},
{
.buf = data,
.len = length
}
};
const struct spi_buf_set tx = {
.buffers = buf,
.count = 2
};
if (cmd & LIS2DH_SPI_READ_BIT) {
const struct spi_buf_set rx = {
.buffers = buf,
.count = 2
};
return spi_transceive(ctx->spi, &ctx->spi_cfg, &tx, &rx);
}
return spi_write(ctx->spi, &ctx->spi_cfg, &tx);
}
#endif
#if defined(CONFIG_LIS2DH_TRIGGER) || defined(CONFIG_LIS2DH_ACCEL_RANGE_RUNTIME) #if defined(CONFIG_LIS2DH_TRIGGER) || defined(CONFIG_LIS2DH_ACCEL_RANGE_RUNTIME)
int lis2dh_reg_field_update(struct device *bus, u8_t reg_addr, int lis2dh_reg_field_update(struct device *dev, u8_t reg_addr,
u8_t pos, u8_t mask, u8_t val) u8_t pos, u8_t mask, u8_t val)
{ {
int status; int status;
@ -20,12 +52,12 @@ int lis2dh_reg_field_update(struct device *bus, u8_t reg_addr,
/* just to remove gcc warning */ /* just to remove gcc warning */
old_val = 0; old_val = 0;
status = lis2dh_reg_read_byte(bus, reg_addr, &old_val); status = lis2dh_reg_read_byte(dev, reg_addr, &old_val);
if (status < 0) { if (status < 0) {
return status; return status;
} }
return lis2dh_reg_write_byte(bus, reg_addr, return lis2dh_reg_write_byte(dev, reg_addr,
(old_val & ~mask) | ((val << pos) & mask)); (old_val & ~mask) | ((val << pos) & mask));
} }
#endif #endif
@ -98,7 +130,7 @@ static int lis2dh_sample_fetch(struct device *dev, enum sensor_channel chan)
* since status and all accel data register addresses are consecutive, * since status and all accel data register addresses are consecutive,
* a burst read can be used to read all the samples * a burst read can be used to read all the samples
*/ */
status = lis2dh_burst_read(lis2dh->bus, LIS2DH_REG_STATUS, status = lis2dh_burst_read(dev, LIS2DH_REG_STATUS,
lis2dh->sample.raw, lis2dh->sample.raw,
sizeof(lis2dh->sample.raw)); sizeof(lis2dh->sample.raw));
if (status < 0) { if (status < 0) {
@ -161,7 +193,7 @@ static int lis2dh_acc_odr_set(struct device *dev, u16_t freq)
return odr; return odr;
} }
status = lis2dh_reg_read_byte(lis2dh->bus, LIS2DH_REG_CTRL1, &value); status = lis2dh_reg_read_byte(dev, LIS2DH_REG_CTRL1, &value);
if (status < 0) { if (status < 0) {
return status; return status;
} }
@ -176,7 +208,7 @@ static int lis2dh_acc_odr_set(struct device *dev, u16_t freq)
odr--; odr--;
} }
return lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_CTRL1, return lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL1,
(value & ~LIS2DH_ODR_MASK) | (value & ~LIS2DH_ODR_MASK) |
LIS2DH_ODR_RATE(odr)); LIS2DH_ODR_RATE(odr));
} }
@ -216,7 +248,7 @@ static int lis2dh_acc_range_set(struct device *dev, s32_t range)
lis2dh->scale = LIS2DH_ACCEL_SCALE(range); lis2dh->scale = LIS2DH_ACCEL_SCALE(range);
return lis2dh_reg_field_update(lis2dh->bus, LIS2DH_REG_CTRL4, return lis2dh_reg_field_update(dev, LIS2DH_REG_CTRL4,
LIS2DH_FS_SHIFT, LIS2DH_FS_SHIFT,
LIS2DH_FS_MASK, LIS2DH_FS_MASK,
fs); fs);
@ -282,17 +314,8 @@ int lis2dh_init(struct device *dev)
int status; int status;
u8_t raw[LIS2DH_DATA_OFS + 6]; u8_t raw[LIS2DH_DATA_OFS + 6];
lis2dh->bus = device_get_binding(LIS2DH_BUS_DEV_NAME); status = lis2dh_bus_configure(dev);
if (lis2dh->bus == NULL) {
SYS_LOG_ERR("Could not get pointer to %s device",
LIS2DH_BUS_DEV_NAME);
return -EINVAL;
}
/* configure bus, e.g. spi clock and format */
status = lis2dh_bus_configure(lis2dh->bus);
if (status < 0) { if (status < 0) {
SYS_LOG_ERR("Failed to configure bus (spi, i2c)");
return status; return status;
} }
@ -304,7 +327,7 @@ int lis2dh_init(struct device *dev)
memset(raw, 0, sizeof(raw)); memset(raw, 0, sizeof(raw));
raw[LIS2DH_DATA_OFS] = LIS2DH_ACCEL_EN_BITS; raw[LIS2DH_DATA_OFS] = LIS2DH_ACCEL_EN_BITS;
status = lis2dh_burst_write(lis2dh->bus, LIS2DH_REG_CTRL1, raw, status = lis2dh_burst_write(dev, LIS2DH_REG_CTRL1, raw,
sizeof(raw)); sizeof(raw));
if (status < 0) { if (status < 0) {
SYS_LOG_ERR("Failed to reset ctrl registers."); SYS_LOG_ERR("Failed to reset ctrl registers.");
@ -313,7 +336,7 @@ int lis2dh_init(struct device *dev)
/* set full scale range and store it for later conversion */ /* set full scale range and store it for later conversion */
lis2dh->scale = LIS2DH_ACCEL_SCALE(1 << (LIS2DH_FS_IDX + 1)); lis2dh->scale = LIS2DH_ACCEL_SCALE(1 << (LIS2DH_FS_IDX + 1));
status = lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_CTRL4, status = lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL4,
LIS2DH_FS_BITS); LIS2DH_FS_BITS);
if (status < 0) { if (status < 0) {
SYS_LOG_ERR("Failed to set full scale ctrl register."); SYS_LOG_ERR("Failed to set full scale ctrl register.");
@ -333,7 +356,7 @@ int lis2dh_init(struct device *dev)
LIS2DH_ODR_IDX, (u8_t)LIS2DH_LP_EN_BIT, lis2dh->scale); LIS2DH_ODR_IDX, (u8_t)LIS2DH_LP_EN_BIT, lis2dh->scale);
/* enable accel measurements and set power mode and data rate */ /* enable accel measurements and set power mode and data rate */
return lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_CTRL1, return lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL1,
LIS2DH_ACCEL_EN_BITS | LIS2DH_LP_EN_BIT | LIS2DH_ACCEL_EN_BITS | LIS2DH_LP_EN_BIT |
LIS2DH_ODR_BITS); LIS2DH_ODR_BITS);
} }

121
drivers/sensor/lis2dh/lis2dh.h
View file

@ -25,7 +25,7 @@
#define LIS2DH_SPI_ADDR_MASK BIT_MASK(6) #define LIS2DH_SPI_ADDR_MASK BIT_MASK(6)
/* LIS2DH supports only SPI mode 0, word size 8 bits, MSB first */ /* LIS2DH supports only SPI mode 0, word size 8 bits, MSB first */
#define LIS2DH_SPI_CFG 0x80 #define LIS2DH_SPI_CFG SPI_WORD_SET(8)
#define LIS2DH_BUS_DEV_NAME CONFIG_LIS2DH_SPI_MASTER_DEV_NAME #define LIS2DH_BUS_DEV_NAME CONFIG_LIS2DH_SPI_MASTER_DEV_NAME
@ -184,8 +184,12 @@ union lis2dh_sample {
}; };
struct lis2dh_data { struct lis2dh_data {
#if defined(CONFIG_LIS2DH_BUS_SPI)
struct device *spi;
struct spi_config spi_cfg;
#else
struct device *bus; struct device *bus;
#endif
union lis2dh_sample sample; union lis2dh_sample sample;
/* current scaling factor, in micro m/s^2 / lsb */ /* current scaling factor, in micro m/s^2 / lsb */
u16_t scale; u16_t scale;
@ -216,49 +220,40 @@ struct lis2dh_data {
#define SYS_LOG_LEVEL CONFIG_SYS_LOG_SENSOR_LEVEL #define SYS_LOG_LEVEL CONFIG_SYS_LOG_SENSOR_LEVEL
#include <logging/sys_log.h> #include <logging/sys_log.h>
static inline int lis2dh_burst_read(struct device *bus, u8_t start_addr, #if defined(CONFIG_LIS2DH_BUS_SPI)
int lis2dh_spi_access(struct lis2dh_data *ctx, u8_t cmd,
void *data, size_t length);
#endif
static inline int lis2dh_burst_read(struct device *dev, u8_t start_addr,
u8_t *buf, u8_t num_bytes) u8_t *buf, u8_t num_bytes)
{ {
struct lis2dh_data *lis2dh = dev->driver_data;
#if defined(CONFIG_LIS2DH_BUS_SPI) #if defined(CONFIG_LIS2DH_BUS_SPI)
int status; start_addr |= LIS2DH_SPI_READ_BIT | LIS2DH_SPI_AUTOINC_ADDR;
u8_t tx_buf = LIS2DH_SPI_READ_BIT | LIS2DH_SPI_AUTOINC_ADDR |
start_addr;
status = spi_slave_select(bus, LIS2DH_BUS_ADDRESS); return lis2dh_spi_access(lis2dh, start_addr, buf, num_bytes);
status = spi_transceive(bus, &tx_buf, 1, buf, num_bytes);
SYS_LOG_DBG("tx=0x%x num=0x%x, status=%d", tx_buf,
num_bytes, status);
return status;
#elif defined(CONFIG_LIS2DH_BUS_I2C) #elif defined(CONFIG_LIS2DH_BUS_I2C)
return i2c_burst_read(bus, LIS2DH_BUS_ADDRESS, start_addr, buf, return i2c_burst_read(lis2dh->bus, LIS2DH_BUS_ADDRESS, start_addr,
num_bytes); buf, num_bytes);
#else #else
return -ENODEV; return -ENODEV;
#endif #endif
} }
static inline int lis2dh_reg_read_byte(struct device *bus, u8_t reg_addr, static inline int lis2dh_reg_read_byte(struct device *dev, u8_t reg_addr,
u8_t *value) u8_t *value)
{ {
struct lis2dh_data *lis2dh = dev->driver_data;
#if defined(CONFIG_LIS2DH_BUS_SPI) #if defined(CONFIG_LIS2DH_BUS_SPI)
int status; reg_addr |= LIS2DH_SPI_READ_BIT;
u8_t tx_buf = LIS2DH_SPI_READ_BIT | reg_addr;
u8_t rx_buf[2];
status = spi_slave_select(bus, LIS2DH_BUS_ADDRESS); return lis2dh_spi_access(lis2dh, reg_addr, value, 1);
status = spi_transceive(bus, &tx_buf, 1, rx_buf, 2);
if (status == 0) {
*value = rx_buf[1];
}
SYS_LOG_DBG("tx=0x%x rx1=0x%x", tx_buf, rx_buf[1]);
return status;
#elif defined(CONFIG_LIS2DH_BUS_I2C) #elif defined(CONFIG_LIS2DH_BUS_I2C)
return i2c_reg_read_byte(bus, LIS2DH_BUS_ADDRESS, reg_addr, value); return i2c_reg_read_byte(lis2dh->bus, LIS2DH_BUS_ADDRESS,
reg_addr, value);
#else #else
return -ENODEV; return -ENODEV;
#endif #endif
@ -267,58 +262,64 @@ static inline int lis2dh_reg_read_byte(struct device *bus, u8_t reg_addr,
static inline int lis2dh_burst_write(struct device *bus, u8_t start_addr, static inline int lis2dh_burst_write(struct device *bus, u8_t start_addr,
u8_t *buf, u8_t num_bytes) u8_t *buf, u8_t num_bytes)
{ {
struct lis2dh_data *lis2dh = dev->driver_data;
#if defined(CONFIG_LIS2DH_BUS_SPI) #if defined(CONFIG_LIS2DH_BUS_SPI)
int status; start_addr |= LIS2DH_SPI_AUTOINC_ADDR;
u8_t dummy;
buf[0] = LIS2DH_SPI_AUTOINC_ADDR | start_addr; return lis2dh_spi_access(lis2dh, start_addr, buf, num_bytes);
status = spi_slave_select(bus, LIS2DH_BUS_ADDRESS);
status = spi_transceive(bus, buf, num_bytes, &dummy, 0);
SYS_LOG_DBG("tx=0x%x num=0x%x, status=%d", buf[0],
num_bytes, status);
return status;
#elif defined(CONFIG_LIS2DH_BUS_I2C) #elif defined(CONFIG_LIS2DH_BUS_I2C)
return i2c_burst_write(bus, LIS2DH_BUS_ADDRESS, start_addr, buf, return i2c_burst_write(lis2dh->bus, LIS2DH_BUS_ADDRESS, start_addr,
num_bytes); buf, num_bytes);
#else #else
return -ENODEV; return -ENODEV;
#endif #endif
} }
static inline int lis2dh_reg_write_byte(struct device *bus, u8_t reg_addr, static inline int lis2dh_reg_write_byte(struct device *dev, u8_t reg_addr,
u8_t value) u8_t value)
{ {
struct lis2dh_data *lis2dh = dev->driver_data;
#if defined(CONFIG_LIS2DH_BUS_SPI) #if defined(CONFIG_LIS2DH_BUS_SPI)
u8_t tx_buf[2] = { reg_addr & LIS2DH_SPI_ADDR_MASK, value }; reg_addr &= LIS2DH_SPI_ADDR_MASK;
u8_t dummy;
spi_slave_select(bus, LIS2DH_BUS_ADDRESS); return lis2dh_spi_access(lis2dh, reg_addr, &value, 1);
SYS_LOG_DBG("tx0=0x%x tx1=0x%x", tx_buf[0], tx_buf[1]);
return spi_transceive(bus, tx_buf, 2, &dummy, 0);
#elif defined(CONFIG_LIS2DH_BUS_I2C) #elif defined(CONFIG_LIS2DH_BUS_I2C)
u8_t tx_buf[2] = {reg_addr, value}; u8_t tx_buf[2] = {reg_addr, value};
return i2c_write(bus, tx_buf, sizeof(tx_buf), LIS2DH_BUS_ADDRESS); return i2c_write(lis2dh->bus, tx_buf, sizeof(tx_buf),
LIS2DH_BUS_ADDRESS);
#else #else
return -ENODEV; return -ENODEV;
#endif #endif
} }
static inline int lis2dh_bus_configure(struct device *bus) static inline int lis2dh_bus_configure(struct device *dev)
{ {
#if defined(CONFIG_LIS2DH_BUS_SPI) struct lis2dh_data *lis2dh = dev->driver_data;
struct spi_config config = {
.config = LIS2DH_SPI_CFG,
.max_sys_freq = CONFIG_LIS2DH_SPI_FREQUENCY,
};
return spi_configure(bus, &config); #if defined(CONFIG_LIS2DH_BUS_SPI)
lis2dh->spi = device_get_binding(LIS2DH_BUS_DEV_NAME);
if (lis2dh->spi == NULL) {
SYS_LOG_ERR("Could not get pointer to %s device",
LIS2DH_BUS_DEV_NAME);
return -EINVAL;
}
lis2dh->spi_cfg.operation = LIS2DH_SPI_CFG;
lis2dh->spi_cfg.frequency = CONFIG_LIS2DH_SPI_FREQUENCY;
lis2dh->spi_cfg.slave = LIS2DH_BUS_ADDRESS;
return 0;
#elif defined(CONFIG_LIS2DH_BUS_I2C) #elif defined(CONFIG_LIS2DH_BUS_I2C)
lis2dh->bus = device_get_binding(LIS2DH_BUS_DEV_NAME);
if (lis2dh->bus == NULL) {
SYS_LOG_ERR("Could not get pointer to %s device",
LIS2DH_BUS_DEV_NAME);
return -EINVAL;
}
return 0; return 0;
#else #else
return -ENODEV; return -ENODEV;
@ -332,7 +333,7 @@ int lis2dh_trigger_set(struct device *dev,
int lis2dh_init_interrupt(struct device *dev); int lis2dh_init_interrupt(struct device *dev);
int lis2dh_reg_field_update(struct device *bus, u8_t reg_addr, int lis2dh_reg_field_update(struct device *dev, u8_t reg_addr,
u8_t pos, u8_t mask, u8_t val); u8_t pos, u8_t mask, u8_t val);
int lis2dh_acc_slope_config(struct device *dev, enum sensor_attribute attr, int lis2dh_acc_slope_config(struct device *dev, enum sensor_attribute attr,

49
drivers/sensor/lis2dh/lis2dh_trigger.c
View file

@ -25,7 +25,7 @@ static int lis2dh_trigger_drdy_set(struct device *dev, enum sensor_channel chan,
/* cancel potentially pending trigger */ /* cancel potentially pending trigger */
atomic_clear_bit(&lis2dh->trig_flags, TRIGGED_INT1); atomic_clear_bit(&lis2dh->trig_flags, TRIGGED_INT1);
status = lis2dh_reg_field_update(lis2dh->bus, LIS2DH_REG_CTRL3, status = lis2dh_reg_field_update(dev, LIS2DH_REG_CTRL3,
LIS2DH_EN_DRDY1_INT1_SHIFT, LIS2DH_EN_DRDY1_INT1_SHIFT,
LIS2DH_EN_DRDY1_INT1, 0); LIS2DH_EN_DRDY1_INT1, 0);
@ -49,18 +49,19 @@ static int lis2dh_trigger_drdy_set(struct device *dev, enum sensor_channel chan,
return 0; return 0;
} }
static int lis2dh_start_trigger_int1(const struct lis2dh_data *lis2dh) static int lis2dh_start_trigger_int1(struct device *dev)
{ {
struct lis2dh_data *lis2dh = dev->driver_data;
int status; int status;
u8_t raw[LIS2DH_BUF_SZ]; u8_t raw[LIS2DH_BUF_SZ];
u8_t ctrl1 = 0; u8_t ctrl1 = 0;
/* power down temporarly to align interrupt & data output sampling */ /* power down temporarly to align interrupt & data output sampling */
status = lis2dh_reg_read_byte(lis2dh->bus, LIS2DH_REG_CTRL1, &ctrl1); status = lis2dh_reg_read_byte(dev, LIS2DH_REG_CTRL1, &ctrl1);
if (unlikely(status < 0)) { if (unlikely(status < 0)) {
return status; return status;
} }
status = lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_CTRL1, status = lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL1,
ctrl1 & ~LIS2DH_ODR_MASK); ctrl1 & ~LIS2DH_ODR_MASK);
if (unlikely(status < 0)) { if (unlikely(status < 0)) {
return status; return status;
@ -69,8 +70,7 @@ static int lis2dh_start_trigger_int1(const struct lis2dh_data *lis2dh)
SYS_LOG_DBG("ctrl1=0x%x @tick=%u", ctrl1, k_cycle_get_32()); SYS_LOG_DBG("ctrl1=0x%x @tick=%u", ctrl1, k_cycle_get_32());
/* empty output data */ /* empty output data */
status = lis2dh_burst_read(lis2dh->bus, LIS2DH_REG_STATUS, raw, status = lis2dh_burst_read(dev, LIS2DH_REG_STATUS, raw, sizeof(raw));
sizeof(raw));
if (unlikely(status < 0)) { if (unlikely(status < 0)) {
return status; return status;
} }
@ -78,12 +78,12 @@ static int lis2dh_start_trigger_int1(const struct lis2dh_data *lis2dh)
gpio_pin_enable_callback(lis2dh->gpio, CONFIG_LIS2DH_INT1_GPIO_PIN); gpio_pin_enable_callback(lis2dh->gpio, CONFIG_LIS2DH_INT1_GPIO_PIN);
/* re-enable output sampling */ /* re-enable output sampling */
status = lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_CTRL1, ctrl1); status = lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL1, ctrl1);
if (unlikely(status < 0)) { if (unlikely(status < 0)) {
return status; return status;
} }
return lis2dh_reg_field_update(lis2dh->bus, LIS2DH_REG_CTRL3, return lis2dh_reg_field_update(dev, LIS2DH_REG_CTRL3,
LIS2DH_EN_DRDY1_INT1_SHIFT, LIS2DH_EN_DRDY1_INT1_SHIFT,
LIS2DH_EN_DRDY1_INT1, 1); LIS2DH_EN_DRDY1_INT1, 1);
} }
@ -104,11 +104,10 @@ static int lis2dh_trigger_anym_set(struct device *dev,
atomic_clear_bit(&lis2dh->trig_flags, TRIGGED_INT2); atomic_clear_bit(&lis2dh->trig_flags, TRIGGED_INT2);
/* disable all interrupt 2 events */ /* disable all interrupt 2 events */
status = lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_INT2_CFG, 0); status = lis2dh_reg_write_byte(dev, LIS2DH_REG_INT2_CFG, 0);
/* make sure any pending interrupt is cleared */ /* make sure any pending interrupt is cleared */
status = lis2dh_reg_read_byte(lis2dh->bus, LIS2DH_REG_INT2_SRC, status = lis2dh_reg_read_byte(dev, LIS2DH_REG_INT2_SRC, &reg_val);
&reg_val);
lis2dh->handler_anymotion = handler; lis2dh->handler_anymotion = handler;
if ((handler == NULL) || (status < 0)) { if ((handler == NULL) || (status < 0)) {
@ -127,8 +126,9 @@ static int lis2dh_trigger_anym_set(struct device *dev,
return 0; return 0;
} }
static int lis2dh_start_trigger_int2(const struct lis2dh_data *lis2dh) static int lis2dh_start_trigger_int2(struct device *dev)
{ {
struct lis2dh_data *lis2dh = dev->driver_data;
int status; int status;
status = gpio_pin_enable_callback(lis2dh->gpio, status = gpio_pin_enable_callback(lis2dh->gpio,
@ -137,7 +137,7 @@ static int lis2dh_start_trigger_int2(const struct lis2dh_data *lis2dh)
SYS_LOG_ERR("enable callback failed err=%d", status); SYS_LOG_ERR("enable callback failed err=%d", status);
} }
return lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_INT2_CFG, return lis2dh_reg_write_byte(dev, LIS2DH_REG_INT2_CFG,
LIS2DH_ANYM_CFG); LIS2DH_ANYM_CFG);
} }
@ -165,8 +165,7 @@ int lis2dh_acc_slope_config(struct device *dev, enum sensor_attribute attr,
u8_t range_g, reg_val; u8_t range_g, reg_val;
u32_t slope_th_ums2; u32_t slope_th_ums2;
status = lis2dh_reg_read_byte(lis2dh->bus, LIS2DH_REG_CTRL4, status = lis2dh_reg_read_byte(dev, LIS2DH_REG_CTRL4, &reg_val);
&reg_val);
if (status < 0) { if (status < 0) {
return status; return status;
} }
@ -188,7 +187,7 @@ int lis2dh_acc_slope_config(struct device *dev, enum sensor_attribute attr,
SYS_LOG_INF("int2_ths=0x%x range_g=%d ums2=%u", reg_val, SYS_LOG_INF("int2_ths=0x%x range_g=%d ums2=%u", reg_val,
range_g, slope_th_ums2 - 1); range_g, slope_th_ums2 - 1);
status = lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_INT2_THS, status = lis2dh_reg_write_byte(dev, LIS2DH_REG_INT2_THS,
reg_val); reg_val);
} else { /* SENSOR_ATTR_SLOPE_DUR */ } else { /* SENSOR_ATTR_SLOPE_DUR */
/* /*
@ -201,7 +200,7 @@ int lis2dh_acc_slope_config(struct device *dev, enum sensor_attribute attr,
SYS_LOG_INF("int2_dur=0x%x", val->val1); SYS_LOG_INF("int2_dur=0x%x", val->val1);
status = lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_INT2_DUR, status = lis2dh_reg_write_byte(dev, LIS2DH_REG_INT2_DUR,
val->val1); val->val1);
} }
@ -249,7 +248,7 @@ static void lis2dh_thread_cb(void *arg)
if (unlikely(atomic_test_and_clear_bit(&lis2dh->trig_flags, if (unlikely(atomic_test_and_clear_bit(&lis2dh->trig_flags,
START_TRIG_INT1))) { START_TRIG_INT1))) {
int status = lis2dh_start_trigger_int1(lis2dh); int status = lis2dh_start_trigger_int1(dev);
if (unlikely(status < 0)) { if (unlikely(status < 0)) {
SYS_LOG_ERR("lis2dh_start_trigger_int1: %d", status); SYS_LOG_ERR("lis2dh_start_trigger_int1: %d", status);
@ -259,7 +258,7 @@ static void lis2dh_thread_cb(void *arg)
if (unlikely(atomic_test_and_clear_bit(&lis2dh->trig_flags, if (unlikely(atomic_test_and_clear_bit(&lis2dh->trig_flags,
START_TRIG_INT2))) { START_TRIG_INT2))) {
int status = lis2dh_start_trigger_int2(lis2dh); int status = lis2dh_start_trigger_int2(dev);
if (unlikely(status < 0)) { if (unlikely(status < 0)) {
SYS_LOG_ERR("lis2dh_start_trigger_int2: %d", status); SYS_LOG_ERR("lis2dh_start_trigger_int2: %d", status);
@ -290,8 +289,7 @@ static void lis2dh_thread_cb(void *arg)
u8_t reg_val; u8_t reg_val;
/* clear interrupt 2 to de-assert int2 line */ /* clear interrupt 2 to de-assert int2 line */
lis2dh_reg_read_byte(lis2dh->bus, LIS2DH_REG_INT2_SRC, lis2dh_reg_read_byte(dev, LIS2DH_REG_INT2_SRC, &reg_val);
&reg_val);
if (likely(lis2dh->handler_anymotion != NULL)) { if (likely(lis2dh->handler_anymotion != NULL)) {
lis2dh->handler_anymotion(dev, &anym_trigger); lis2dh->handler_anymotion(dev, &anym_trigger);
@ -401,7 +399,7 @@ int lis2dh_init_interrupt(struct device *dev)
lis2dh->dev = dev; lis2dh->dev = dev;
#endif #endif
/* disable interrupt 2 in case of warm (re)boot */ /* disable interrupt 2 in case of warm (re)boot */
status = lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_INT2_CFG, 0); status = lis2dh_reg_write_byte(dev, LIS2DH_REG_INT2_CFG, 0);
if (status < 0) { if (status < 0) {
SYS_LOG_ERR("Interrupt 2 disable reg write failed (%d)", SYS_LOG_ERR("Interrupt 2 disable reg write failed (%d)",
status); status);
@ -409,15 +407,14 @@ int lis2dh_init_interrupt(struct device *dev)
} }
memset(raw, 0, sizeof(raw)); memset(raw, 0, sizeof(raw));
status = lis2dh_burst_write(lis2dh->bus, LIS2DH_REG_INT2_THS, raw, status = lis2dh_burst_write(dev, LIS2DH_REG_INT2_THS, raw, sizeof(raw));
sizeof(raw));
if (status < 0) { if (status < 0) {
SYS_LOG_ERR("Burst write to INT2 THS failed (%d)", status); SYS_LOG_ERR("Burst write to INT2 THS failed (%d)", status);
return status; return status;
} }
/* latch int2 line interrupt */ /* latch int2 line interrupt */
status = lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_CTRL5, status = lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL5,
LIS2DH_EN_LIR_INT2); LIS2DH_EN_LIR_INT2);
if (status < 0) { if (status < 0) {
SYS_LOG_ERR("INT2 latch enable reg write failed (%d)", status); SYS_LOG_ERR("INT2 latch enable reg write failed (%d)", status);
@ -429,6 +426,6 @@ int lis2dh_init_interrupt(struct device *dev)
CONFIG_LIS2DH_INT2_GPIO_PIN, LIS2DH_INT2_CFG); CONFIG_LIS2DH_INT2_GPIO_PIN, LIS2DH_INT2_CFG);
/* enable interrupt 2 on int2 line */ /* enable interrupt 2 on int2 line */
return lis2dh_reg_write_byte(lis2dh->bus, LIS2DH_REG_CTRL6, return lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL6,
LIS2DH_EN_INT2_INT2); LIS2DH_EN_INT2_INT2);
} }