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spi_nxp_lpspi: Reset/clock peripheral

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If there are HAL definitions available, do these two things:

Ungate the clock for the device from the zephyr driver. Eventually it
would be better to have a clocks property in the LPSPI DT node and get
the resources from there rather than the HAL.

Some platforms require the peripheral to be reset at system level, add
code to do this. Eventually it would be more ideal to have Zephyr
reset drivers for all of the NXP platforms and use DT to describe the
reset resources, but for now we can just do this to get the LPSPI
supported.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2025-02-18 10:30:22 -06:00 • committed by Benjamin Cabé
commit 2f678bd56c
1 changed files with 56 additions and 0 deletions
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56
drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_common.c
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@ -9,6 +9,49 @@ LOG_MODULE_REGISTER(spi_mcux_lpspi_common, CONFIG_SPI_LOG_LEVEL);
#include "spi_nxp_lpspi_priv.h" #include "spi_nxp_lpspi_priv.h"
#if defined(LPSPI_RSTS) || defined(LPSPI_CLOCKS)
static LPSPI_Type *const lpspi_bases[] = LPSPI_BASE_PTRS;
#endif
#ifdef LPSPI_RSTS
static const reset_ip_name_t lpspi_resets[] = LPSPI_RSTS;
static inline reset_ip_name_t lpspi_get_reset(LPSPI_Type *const base)
{
reset_ip_name_t rst = -1; /* invalid initial value */
ARRAY_FOR_EACH(lpspi_bases, idx) {
if (lpspi_bases[idx] == base) {
rst = lpspi_resets[idx];
break;
}
}
__ASSERT_NO_MSG(rst != -1);
return rst;
}
#endif
#ifdef LPSPI_CLOCKS
static const clock_ip_name_t lpspi_clocks[] = LPSPI_CLOCKS;
static inline clock_ip_name_t lpspi_get_clock(LPSPI_Type *const base)
{
clock_ip_name_t clk = -1; /* invalid initial value */
ARRAY_FOR_EACH(lpspi_bases, idx) {
if (lpspi_bases[idx] == base) {
clk = lpspi_clocks[idx];
break;
}
}
__ASSERT_NO_MSG(clk != -1);
return clk;
}
#endif
void lpspi_wait_tx_fifo_empty(const struct device *dev) void lpspi_wait_tx_fifo_empty(const struct device *dev)
{ {
LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
@ -128,6 +171,17 @@ int spi_mcux_configure(const struct device *dev, const struct spi_config *spi_cf
return 0; return 0;
} }
static void lpspi_module_system_init(LPSPI_Type *base)
{
#ifdef LPSPI_CLOCKS
CLOCK_EnableClock(lpspi_get_clock(base));
#endif
#ifdef LPSPI_RSTS
RESET_ReleasePeripheralReset(lpspi_get_reset(base));
#endif
}
int spi_nxp_init_common(const struct device *dev) int spi_nxp_init_common(const struct device *dev)
{ {
LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
@ -144,6 +198,8 @@ int spi_nxp_init_common(const struct device *dev)
return -ENODEV; return -ENODEV;
} }
lpspi_module_system_init(base);
err = spi_context_cs_configure_all(&data->ctx); err = spi_context_cs_configure_all(&data->ctx);
if (err < 0) { if (err < 0) {
return err; return err;