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soc: arm: nxp: lpc55xxx: Added FlexPWM to the SOC Kconfig

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Added MCUX_PWM Kconfig dependency;
Added missing pin function definition needed for PWM;
Enabled submodule clocks for FlexPWM

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
This commit is contained in:
Emilio Benavente 2022-08-03 15:49:58 -05:00 • committed by Fabio Baltieri
commit 2f149fb653
3 changed files with 13 additions and 0 deletions
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1
soc/arm/nxp_lpc/lpc55xxx/Kconfig.soc
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@ -54,6 +54,7 @@ config SOC_LPC55S36
select ARM_TRUSTZONE_M select ARM_TRUSTZONE_M
select CLOCK_CONTROL select CLOCK_CONTROL
select HAS_MCUX_MCAN select HAS_MCUX_MCAN
select HAS_MCUX_PWM
config SOC_LPC55S69_CPU0 config SOC_LPC55S69_CPU0
bool "SOC_LPC55S69 M33 [CPU 0]" bool "SOC_LPC55S69 M33 [CPU 0]"

10
soc/arm/nxp_lpc/lpc55xxx/soc.c
View file

@ -204,6 +204,16 @@ DT_FOREACH_STATUS_OKAY(nxp_lpc_ctimer, CTIMER_CLOCK_SETUP)
#endif #endif
#endif /* CONFIG_SOC_LPC55S69_CPU0 */ #endif /* CONFIG_SOC_LPC55S69_CPU0 */
#if defined(CONFIG_SOC_LPC55S36) && defined(CONFIG_PWM)
/* Set the Submodule Clocks for FlexPWM */
SYSCON->PWM0SUBCTL |=
(SYSCON_PWM0SUBCTL_CLK0_EN_MASK | SYSCON_PWM0SUBCTL_CLK1_EN_MASK |
SYSCON_PWM0SUBCTL_CLK2_EN_MASK);
SYSCON->PWM1SUBCTL |=
(SYSCON_PWM1SUBCTL_CLK0_EN_MASK | SYSCON_PWM1SUBCTL_CLK1_EN_MASK |
SYSCON_PWM1SUBCTL_CLK2_EN_MASK);
#endif
} }
/** /**

2
soc/arm/nxp_lpc/lpc55xxx/soc.h
View file

@ -32,6 +32,8 @@
#define IOCON_PIO_FUNC7 0x07u /*!<@brief Selects pin function 7 */ #define IOCON_PIO_FUNC7 0x07u /*!<@brief Selects pin function 7 */
#define IOCON_PIO_FUNC9 0x09u /*!<@brief Selects pin function 9 */ #define IOCON_PIO_FUNC9 0x09u /*!<@brief Selects pin function 9 */
#define IOCON_PIO_FUNC10 0x0Au /*!<@brief Selects pin function 10 */ #define IOCON_PIO_FUNC10 0x0Au /*!<@brief Selects pin function 10 */
#define IOCON_PIO_FUNC11 0x0Bu /*!<@brief Selects pin function 11 */
#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input function not inverted */ #define IOCON_PIO_INV_DI 0x00u /*!<@brief Input function not inverted */
#define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */ #define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */
#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!<@brief Open drain is disabled */ #define IOCON_PIO_OPENDRAIN_DI 0x00u /*!<@brief Open drain is disabled */