drivers: eth: mcux: Add PHY address to eth_context
This will allow having a different PHY address for each controller. It also avoids for the PHY address to be hard-coded in several functions. Signed-off-by: Armand Ciejak <armandciejak@users.noreply.github.com>
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1 changed files with 31 additions and 26 deletions
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@ -88,6 +88,7 @@ struct eth_context {
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enum eth_mcux_phy_state phy_state;
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bool enabled;
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bool link_up;
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u32_t phy_addr;
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phy_duplex_t phy_duplex;
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phy_speed_t phy_speed;
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u8_t mac_addr[6];
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@ -196,10 +197,9 @@ static inline struct net_if *get_iface(struct eth_context *ctx, u16_t vlan_tag)
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static void eth_mcux_phy_enter_reset(struct eth_context *context)
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{
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const u32_t phy_addr = 0U;
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/* Reset the PHY. */
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ENET_StartSMIWrite(context->base, phy_addr, PHY_BASICCONTROL_REG,
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ENET_StartSMIWrite(context->base, context->phy_addr,
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PHY_BASICCONTROL_REG,
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kENET_MiiWriteValidFrame,
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PHY_BCTL_RESET_MASK);
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context->phy_state = eth_mcux_phy_state_reset;
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@ -207,7 +207,6 @@ static void eth_mcux_phy_enter_reset(struct eth_context *context)
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static void eth_mcux_phy_start(struct eth_context *context)
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{
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const u32_t phy_addr = 0U;
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#ifdef CONFIG_ETH_MCUX_PHY_EXTRA_DEBUG
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LOG_DBG("phy_state=%s", phy_state_name(context->phy_state));
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#endif
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@ -218,9 +217,10 @@ static void eth_mcux_phy_start(struct eth_context *context)
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case eth_mcux_phy_state_initial:
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ENET_ActiveRead(context->base);
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/* Reset the PHY. */
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ENET_StartSMIWrite(context->base, phy_addr, PHY_BASICCONTROL_REG,
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kENET_MiiWriteValidFrame,
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PHY_BCTL_RESET_MASK);
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ENET_StartSMIWrite(context->base, context->phy_addr,
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PHY_BASICCONTROL_REG,
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kENET_MiiWriteValidFrame,
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PHY_BCTL_RESET_MASK);
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#ifdef CONFIG_SOC_SERIES_IMX_RT
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context->phy_state = eth_mcux_phy_state_initial;
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#else
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@ -277,7 +277,6 @@ static void eth_mcux_phy_event(struct eth_context *context)
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bool link_up;
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phy_duplex_t phy_duplex = kPHY_FullDuplex;
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phy_speed_t phy_speed = kPHY_Speed100M;
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const u32_t phy_addr = 0U;
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#ifdef CONFIG_ETH_MCUX_PHY_EXTRA_DEBUG
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LOG_DBG("phy_state=%s", phy_state_name(context->phy_state));
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@ -285,10 +284,11 @@ static void eth_mcux_phy_event(struct eth_context *context)
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switch (context->phy_state) {
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case eth_mcux_phy_state_initial:
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#ifdef CONFIG_SOC_SERIES_IMX_RT
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ENET_StartSMIRead(context->base, phy_addr, PHY_CONTROL2_REG,
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kENET_MiiReadValidFrame);
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ENET_StartSMIWrite(context->base, phy_addr, PHY_CONTROL2_REG,
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kENET_MiiWriteValidFrame, PHY_CTL2_REFCLK_SELECT_MASK);
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ENET_StartSMIRead(context->base, context->phy_addr,
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PHY_CONTROL2_REG, kENET_MiiReadValidFrame);
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ENET_StartSMIWrite(context->base, context->phy_addr,
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PHY_CONTROL2_REG, kENET_MiiWriteValidFrame,
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PHY_CTL2_REFCLK_SELECT_MASK);
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context->phy_state = eth_mcux_phy_state_reset;
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#endif
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break;
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@ -302,7 +302,8 @@ static void eth_mcux_phy_event(struct eth_context *context)
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break;
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case eth_mcux_phy_state_reset:
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/* Setup PHY autonegotiation. */
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ENET_StartSMIWrite(context->base, phy_addr, PHY_AUTONEG_ADVERTISE_REG,
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ENET_StartSMIWrite(context->base, context->phy_addr,
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PHY_AUTONEG_ADVERTISE_REG,
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kENET_MiiWriteValidFrame,
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(PHY_100BASETX_FULLDUPLEX_MASK |
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PHY_100BASETX_HALFDUPLEX_MASK |
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@ -312,7 +313,8 @@ static void eth_mcux_phy_event(struct eth_context *context)
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break;
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case eth_mcux_phy_state_autoneg:
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/* Setup PHY autonegotiation. */
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ENET_StartSMIWrite(context->base, phy_addr, PHY_BASICCONTROL_REG,
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ENET_StartSMIWrite(context->base, context->phy_addr,
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PHY_BASICCONTROL_REG,
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kENET_MiiWriteValidFrame,
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(PHY_BCTL_AUTONEG_MASK |
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PHY_BCTL_RESTART_AUTONEG_MASK));
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@ -321,7 +323,8 @@ static void eth_mcux_phy_event(struct eth_context *context)
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case eth_mcux_phy_state_wait:
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case eth_mcux_phy_state_restart:
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/* Start reading the PHY basic status. */
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ENET_StartSMIRead(context->base, phy_addr, PHY_BASICSTATUS_REG,
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ENET_StartSMIRead(context->base, context->phy_addr,
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PHY_BASICSTATUS_REG,
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kENET_MiiReadValidFrame);
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context->phy_state = eth_mcux_phy_state_read_status;
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break;
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@ -331,7 +334,8 @@ static void eth_mcux_phy_event(struct eth_context *context)
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link_up = status & PHY_BSTATUS_LINKSTATUS_MASK;
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if (link_up && !context->link_up) {
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/* Start reading the PHY control register. */
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ENET_StartSMIRead(context->base, phy_addr, PHY_CONTROL1_REG,
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ENET_StartSMIRead(context->base, context->phy_addr,
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PHY_CONTROL1_REG,
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kENET_MiiReadValidFrame);
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context->link_up = link_up;
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context->phy_state = eth_mcux_phy_state_read_duplex;
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@ -396,25 +400,25 @@ static void eth_mcux_delayed_phy_work(struct k_work *item)
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eth_mcux_phy_event(context);
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}
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static void eth_mcux_phy_setup(ENET_Type *base)
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static void eth_mcux_phy_setup(struct eth_context *context)
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{
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#ifdef CONFIG_SOC_SERIES_IMX_RT
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const u32_t phy_addr = 0U;
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status_t res;
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u32_t oms_override;
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/* Disable MII interrupts to prevent triggering PHY events. */
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ENET_DisableInterrupts(base, ENET_EIR_MII_MASK);
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ENET_DisableInterrupts(context->base, ENET_EIR_MII_MASK);
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/* Prevent PHY entering NAND Tree mode override. */
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res = PHY_Read(base, phy_addr, PHY_OMS_OVERRIDE_REG, &oms_override);
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res = PHY_Read(context->base, context->phy_addr,
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PHY_OMS_OVERRIDE_REG, &oms_override);
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if (res != kStatus_Success) {
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LOG_WRN("Reading PHY reg failed (status 0x%x)", res);
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} else {
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if (oms_override & PHY_OMS_NANDTREE_MASK) {
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oms_override &= ~PHY_OMS_NANDTREE_MASK;
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res = PHY_Write(base, phy_addr, PHY_OMS_OVERRIDE_REG,
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oms_override);
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res = PHY_Write(context->base, context->phy_addr,
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PHY_OMS_OVERRIDE_REG, oms_override);
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if (res != kStatus_Success) {
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LOG_WRN("Writing PHY reg failed (status 0x%x)",
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res);
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@ -422,7 +426,7 @@ static void eth_mcux_phy_setup(ENET_Type *base)
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}
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}
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ENET_EnableInterrupts(base, ENET_EIR_MII_MASK);
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ENET_EnableInterrupts(context->base, ENET_EIR_MII_MASK);
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#endif
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}
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@ -541,8 +545,8 @@ static int eth_tx(struct device *dev, struct net_pkt *pkt)
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context->enet_handle.txBdCurrent[0];
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#endif
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status = ENET_SendFrame(context->base, &context->enet_handle, context->frame_buf,
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total_len);
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status = ENET_SendFrame(context->base, &context->enet_handle,
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context->frame_buf, total_len);
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#if defined(CONFIG_PTP_CLOCK_MCUX)
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timestamped_frame = eth_get_ptp_data(net_pkt_iface(pkt), pkt, NULL,
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@ -891,7 +895,7 @@ static int eth_0_init(struct device *dev)
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ENET_SetSMI(context->base, sys_clock, false);
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/* handle PHY setup after SMI initialization */
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eth_mcux_phy_setup(context->base);
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eth_mcux_phy_setup(context);
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LOG_DBG("MAC %02x:%02x:%02x:%02x:%02x:%02x",
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context->mac_addr[0], context->mac_addr[1],
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@ -1059,6 +1063,7 @@ static void eth_0_config_func(void);
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static struct eth_context eth_0_context = {
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.base = ENET,
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.config_func = eth_0_config_func,
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.phy_addr = 0U,
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.phy_duplex = kPHY_FullDuplex,
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.phy_speed = kPHY_Speed100M,
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#if defined(CONFIG_ETH_MCUX_0_UNIQUE_MAC)
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