From 2ebf885ab0e23764e40164b3ccca26515d610cf8 Mon Sep 17 00:00:00 2001 From: Francois Ramu Date: Wed, 3 Nov 2021 16:12:56 +0100 Subject: [PATCH] drivers: usb device driver for the stm32u5 soc family This commit enables the HSI48 clock for the stm32U5 soc family to use the USB device peripheral. Enable the VDD USB voltage supply. Signed-off-by: Francois Ramu --- drivers/usb/device/Kconfig | 2 +- drivers/usb/device/usb_dc_stm32.c | 10 ++++++++-- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/usb/device/Kconfig b/drivers/usb/device/Kconfig index 7895c71d7df..13f4f21df28 100644 --- a/drivers/usb/device/Kconfig +++ b/drivers/usb/device/Kconfig @@ -28,7 +28,7 @@ config USB_DC_STM32 select USE_STM32_HAL_PCD select USE_STM32_HAL_PCD_EX help - Enable USB support on the STM32 F0, F1, F2, F3, F4, F7, L0, L4 and G4 family of + Enable USB support on the STM32 F0, F1, F2, F3, F4, F7, L0, L4, G4, U5 family of processors. config USB_DC_STM32_DISCONN_ENABLE diff --git a/drivers/usb/device/usb_dc_stm32.c b/drivers/usb/device/usb_dc_stm32.c index 26b2af89e88..a4d70579022 100644 --- a/drivers/usb/device/usb_dc_stm32.c +++ b/drivers/usb/device/usb_dc_stm32.c @@ -203,12 +203,13 @@ static int usb_dc_stm32_clock_enable(void) #if defined(RCC_HSI48_SUPPORT) || \ defined(CONFIG_SOC_SERIES_STM32WBX) || \ defined(CONFIG_SOC_SERIES_STM32H7X) || \ - defined(CONFIG_SOC_SERIES_STM32L5X) + defined(CONFIG_SOC_SERIES_STM32L5X) || \ + defined(CONFIG_SOC_SERIES_STM32U5X) /* * In STM32L0 series, HSI48 requires VREFINT and its buffer * with 48 MHz RC to be enabled. - * See ENREF_HSI48 in referenc maual RM0367 section10.2.3: + * See ENREF_HSI48 in reference manual RM0367 section10.2.3: * "Reference control and status register (SYSCFG_CFGR3)" */ #ifdef CONFIG_SOC_SERIES_STM32L0X @@ -230,6 +231,11 @@ static int usb_dc_stm32_clock_enable(void) LL_RCC_SetUSBClockSource(LL_RCC_USB_CLKSOURCE_HSI48); +#ifdef CONFIG_SOC_SERIES_STM32U5X + /* VDDUSB independent USB supply (PWR clock is on) */ + LL_PWR_EnableVDDUSB(); +#endif /* CONFIG_SOC_SERIES_STM32U5X */ + #if !defined(CONFIG_SOC_SERIES_STM32WBX) /* Specially for STM32WB, don't unlock the HSEM to prevent M0 core * to disable HSI48 clock used for RNG.