atmel_sam3: Do not switch off CPU clock if debugging is planned

at91sam3 supposed to go to Sleep mode and stop the CPU clock
(HCLK). It leads to JTAG problems. In order to be able to use
JTAG, we need to keep CPU clock on. This is achieved by
switching to Wait mode and keeping external main clock.
Since Wait mode switches off automatically Fast RC Oscillator,
but keeps external clock untouched.

Change-Id: Ife37a7691c3cbdf434e560725a71d419adafe054
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>

arch/arm/soc/atmel_sam3/Kconfig

@@ -80,4 +80,13 @@ config SOC_ATMEL_SAM3_PLLA_DIVA
 	With default of MULA == 6, and DIVA == 1,
 	PLL is running at 7 times of main clock.
 
+config SOC_ATMEL_SAM3_WAIT_MODE
+	bool "Atmel SAM3 goes to Wait mode instead of Sleep mode"
+	depends on SOC_ATMEL_SAM3_EXT_MAINCK
+	default y if DEBUG
+	help
+	For JTAG debugging CPU clock (HCLK) should not stop. In order
+	to achieve this, make CPU go to Wait mode instead of Sleep
+	mode while using external crystal oscillator for main clock.
+
 endif # SOC_ATMEL_SAM3

arch/arm/soc/atmel_sam3/soc.c

@@ -81,6 +81,14 @@ static ALWAYS_INLINE void clock_init(void)
 	/* Wait for main oscillator to be selected */
 	while (!(__PMC->sr & PMC_INT_MOSCSELS))
 		;
+#ifdef CONFIG_SOC_ATMEL_SAM3_WAIT_MODE
+	/*
+	 * Instruct CPU enter Wait mode instead of Sleep mode to
+	 * keep Processor Clock (HCLK) and thus be able to debug
+	 * CPU using JTAG
+	 */
+	__PMC->fsmr |= PMC_FSMR_LPM;
+#endif
 #else
 	/* Set main fast RC oscillator to 12 MHz */
 	__PMC->ckgr_mor = PMC_CKGR_MOR_KEY | PMC_CKGR_MOR_MOSCRCF_12MHZ

arch/arm/soc/atmel_sam3/soc.h

@@ -162,6 +162,8 @@
 #define PMC_MCKR_PLLADIV2		(1 << 12)
 #define PMC_MCKR_UPLLDIV2		(1 << 13)
 
+#define PMC_FSMR_LPM			(1 << 20)
+
 #define PMC_INT_MOSCXTS			(1 << 0)
 #define PMC_INT_LOCKA			(1 << 1)
 #define PMC_INT_MCKRDY			(1 << 3)