dts: NXP LPC gpio updates
NXP's LPC family of MCU's GPIOs parameters is udated. Boards LPC54xxx and LPC55xxx have updated values according pin and interrupt layout. Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
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3 changed files with 49 additions and 8 deletions
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@ -58,7 +58,7 @@
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};
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gpio0: gpio@0 {
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compatible = "nxp,kinetis-gpio";
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compatible = "nxp,lpc-gpio";
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reg = <0x4008c000 0x2488>;
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interrupts = <2 2>;
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label = "GPIO_0";
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@ -67,7 +67,7 @@
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};
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gpio1: gpio@1 {
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compatible = "nxp,kinetis-gpio";
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compatible = "nxp,lpc-gpio";
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reg = <0x4008C000 0x2488>;
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interrupts = <3 2>;
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label = "GPIO_1";
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@ -63,23 +63,39 @@
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status = "disabled";
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};
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gpio0: gpio@0 {
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compatible = "nxp,kinetis-gpio";
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gpio0:gpio@0 {
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compatible = "nxp,lpc-gpio";
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reg = <0x5008c000 0x2488>;
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interrupts = <2 2>;
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interrupts = <4 2>;
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label = "GPIO_0";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio1: gpio@1 {
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compatible = "nxp,kinetis-gpio";
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gpio1:gpio@1 {
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compatible = "nxp,lpc-gpio";
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reg = <0x5008c000 0x2488>;
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interrupts = <3 2>;
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interrupts = <5 2>,<6 2>;
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label = "GPIO_1";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio2:gpio@2 {
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compatible = "nxp,lpc-gpio";
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reg = <0x5008c000 0x2488>;
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label = "GPIO_2";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio3:gpio@3 {
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compatible = "nxp,lpc-gpio";
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reg = <0x5008c000 0x2488>;
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label = "GPIO_3";
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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};
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25
dts/bindings/gpio/nxp,lpc-gpio.yaml
Normal file
25
dts/bindings/gpio/nxp,lpc-gpio.yaml
Normal file
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# Copyright (c) 2019, NXP
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# SPDX-License-Identifier: Apache-2.0
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title: LPC GPIO
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description: |
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This is a representation of the LPC GPIO nodes
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compatible: "nxp,lpc-gpio"
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include: [gpio-controller.yaml, base.yaml]
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properties:
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reg:
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required: true
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label:
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required: true
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"#gpio-cells":
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const: 2
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gpio-cells:
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- pin
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- flags
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