diff --git a/boards/arm/disco_l475_iot1/Kconfig.board b/boards/arm/disco_l475_iot1/Kconfig.board new file mode 100644 index 00000000000..0d9f243e035 --- /dev/null +++ b/boards/arm/disco_l475_iot1/Kconfig.board @@ -0,0 +1,10 @@ +# Kconfig - Discovery IoT L475 board configuration +# +# Copyright (c) 2017 Linaro Limited +# +# SPDX-License-Identifier: Apache-2.0 +# + +config BOARD_DISCO_L475_IOT1 + bool "Discovery IoT L475 Development Board" + depends on SOC_STM32L475XG diff --git a/boards/arm/disco_l475_iot1/Kconfig.defconfig b/boards/arm/disco_l475_iot1/Kconfig.defconfig new file mode 100644 index 00000000000..76fb57a8b0e --- /dev/null +++ b/boards/arm/disco_l475_iot1/Kconfig.defconfig @@ -0,0 +1,90 @@ +# Kconfig - Discovery IoT L475 board configuration +# +# Copyright (c) 2017 Linaro Limited +# +# SPDX-License-Identifier: Apache-2.0 +# + +if BOARD_DISCO_L475_IOT1 + +config BOARD + default disco_l475_iot1 + +if GPIO + +config GPIO_STM32_PORTA + def_bool y + +config GPIO_STM32_PORTB + def_bool y + +config GPIO_STM32_PORTC + def_bool y + +config GPIO_STM32_PORTD + def_bool n + +config GPIO_STM32_PORTE + def_bool n + +config GPIO_STM32_PORTF + def_bool n + +config GPIO_STM32_PORTG + def_bool n + +config GPIO_STM32_PORTH + def_bool n + +endif # GPIO + + +if SERIAL + +config UART_STM32_PORT_1 + def_bool y + +endif # SERIAL + + +if I2C + +config I2C_1 + def_bool n + +config I2C_2 + def_bool y + +if I2C_1 + +config I2C_1_DEFAULT_CFG + default 0x14 + +config I2C_1_IRQ_PRI + default 0 + +endif # I2C_1 + +if I2C_2 + +config I2C_2_DEFAULT_CFG + default 0x14 + +config I2C_2_IRQ_PRI + default 0 + +endif # I2C_2 + +endif # I2C + + +if PWM + +config PWM_STM32_1 + def_bool n + +config PWM_STM32_2 + def_bool y + +endif # PWM +endif # BOARD_DISCO_L475_IOT1 diff --git a/boards/arm/disco_l475_iot1/Makefile b/boards/arm/disco_l475_iot1/Makefile new file mode 100644 index 00000000000..c925263c43a --- /dev/null +++ b/boards/arm/disco_l475_iot1/Makefile @@ -0,0 +1,2 @@ +# No C files (yet) +obj- += dummy.o diff --git a/boards/arm/disco_l475_iot1/board.h b/boards/arm/disco_l475_iot1/board.h new file mode 100644 index 00000000000..3c40a6c30d2 --- /dev/null +++ b/boards/arm/disco_l475_iot1/board.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2017 Linaro Limited. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __INC_BOARD_H +#define __INC_BOARD_H + +#include + +/* USER push button */ +#define USER_PB_GPIO_PORT "GPIOC" +#define USER_PB_GPIO_PIN 13 + +/* LD1 green LED */ +#define LD1_GPIO_PORT "GPIOA" +#define LD1_GPIO_PIN 5 + +/* LD2 green LED */ +#define LD2_GPIO_PORT "GPIOB" +#define LD2_GPIO_PIN 14 + +/* LD3 & LD4 are mounted on PC_9 */ +/* PC_9 output: 1: LD2 off, LD3 on */ +/* PC_9 output: 0: LD2 on, LD3 off */ +/* PC_9 input: LD3 off, LD3 off */ +/* LD3 yelllow: Wifi activity */ +#define LD3_GPIO_PORT "GPIOC" +#define LD3_GPIO_PIN 9 +/* LD4 blue: BT activity */ +#define LD4_GPIO_PORT "GPIOC" +#define LD4_GPIO_PIN 9 + +/* Create aliases to make the basic samples work */ +#define SW0_GPIO_NAME USER_PB_GPIO_PORT +#define SW0_GPIO_PIN USER_PB_GPIO_PIN +#define LED0_GPIO_PORT LD2_GPIO_PORT +#define LED0_GPIO_PIN LD2_GPIO_PIN + +#endif /* __INC_BOARD_H */ diff --git a/boards/arm/disco_l475_iot1/disco_l475_iot1_defconfig b/boards/arm/disco_l475_iot1/disco_l475_iot1_defconfig new file mode 100644 index 00000000000..d8f80d39c4b --- /dev/null +++ b/boards/arm/disco_l475_iot1/disco_l475_iot1_defconfig @@ -0,0 +1,53 @@ +CONFIG_ARM=y +CONFIG_BOARD_DISCO_L475_IOT1=y +CONFIG_SOC_FAMILY_STM32=y +CONFIG_SOC_SERIES_STM32L4X=y +CONFIG_SOC_STM32L475XG=y +CONFIG_CORTEX_M_SYSTICK=y +# 80MHz system clock +CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000 + +#enable DTS +CONFIG_HAS_DTS=y + +# enable uart driver +CONFIG_SERIAL=y +CONFIG_UART_STM32=y + +# enable pinmux +CONFIG_PINMUX=y +CONFIG_PINMUX_STM32=y + +# enable GPIOs +CONFIG_GPIO=y +CONFIG_GPIO_STM32=y + +# clock configuration +CONFIG_CLOCK_CONTROL=y +CONFIG_CLOCK_CONTROL_STM32_CUBE=y +# SYSCLK selection +CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y +# PLL configuration +CONFIG_CLOCK_STM32_PLL_SRC_HSI=y +# produce 80MHz clock at PLL output +CONFIG_CLOCK_STM32_PLL_M_DIVISOR=1 +CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=20 +CONFIG_CLOCK_STM32_PLL_P_DIVISOR=7 +CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2 +CONFIG_CLOCK_STM32_PLL_R_DIVISOR=4 +CONFIG_CLOCK_STM32_AHB_PRESCALER=1 +CONFIG_CLOCK_STM32_APB1_PRESCALER=1 +CONFIG_CLOCK_STM32_APB2_PRESCALER=1 + +# console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_1" + +#enable pwm +CONFIG_PWM=y +CONFIG_PWM_STM32=y + +#enable I2C +CONFIG_I2C=y +CONFIG_I2C_STM32LX=y \ No newline at end of file diff --git a/boards/arm/disco_l475_iot1/doc/disco_l475_iot1.rst b/boards/arm/disco_l475_iot1/doc/disco_l475_iot1.rst new file mode 100644 index 00000000000..44e982a1bf9 --- /dev/null +++ b/boards/arm/disco_l475_iot1/doc/disco_l475_iot1.rst @@ -0,0 +1,245 @@ +.. _disco_l475_iot1_board: + +ST Disco L475 IOT01 +################### + +Overview +******** + +The B-L475E-IOT01A Discovery kit for IoT node allows users to develop +applications with direct connection to cloud servers. +The Discovery kit enables a wide diversity of applications by exploiting +low-power communication, multiway sensing and ARM® Cortex® -M4 core-based +STM32L4 Series features. + +This kit provides: + +- 64-Mbit Quad-SPI (Macronix) Flash memory +- Bluetooth® V4.1 module (SPBTLE-RF) +- Sub-GHz (868 or 915 MHz) low-power-programmable RF module (SPSGRF-868 or SPSGRF-915) +- Wi-Fi® module Inventek ISM43362-M3G-L44 (802.11 b/g/n compliant) +- Dynamic NFC tag based on M24SR with its printed NFC antenna +- 2 digital omni-directional microphones (MP34DT01) +- Capacitive digital sensor for relative humidity and temperature (HTS221) +- High-performance 3-axis magnetometer (LIS3MDL) +- 3D accelerometer and 3D gyroscope (LSM6DSL) +- 260-1260 hPa absolute digital output barometer (LPS22HB) +- Time-of-Flight and gesture-detection sensor (VL53L0X) +- 2 push-buttons (user and reset) +- USB OTG FS with Micro-AB connector +- Expansion connectors: + - Arduino™ Uno V3 + - PMOD +- Flexible power-supply options: + - ST LINK USB VBUS or external sources +- On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration capability: + - mass storage, virtual COM port and debug port + + +.. image:: img/disco_l475_iot1.jpg + :width: 531px + :align: center + :height: 354px + :alt: Disco L475 IoT1 + +More information about the board can be found at the `Disco L475 IoT1 website`_. + +Hardware +******** + +The STM32L475RG SoC provides the following hardware IPs: + +- Ultra-low-power with FlexPowerControl (down to 130 nA Standby mode and 100 μA/MHz run mode) +- Core: ARM® 32-bit Cortex®-M4 CPU with FPU, frequency up to 80 MHz, 100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1) +- Clock Sources: + - 4 to 48 MHz crystal oscillator + - 32 kHz crystal oscillator for RTC (LSE) + - Internal 16 MHz factory-trimmed RC (±1%) + - Internal low-power 32 kHz RC (±5%) + - Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25 % accuracy) + - 3 PLLs for system clock, USB, audio, ADC +- RTC with HW calendar, alarms and calibration +- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors +- 16x timers: + - 2x 16-bit advanced motor-control + - 2x 32-bit and 5x 16-bit general purpose + - 2x 16-bit basic + - 2x low-power 16-bit timers (available in Stop mode) + - 2x watchdogs + - SysTick timer +- Up to 114 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V +- Memories + - Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection + - Up to 128 KB of SRAM including 32 KB with hardware parity check + - External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories + - Quad SPI memory interface +- 4x digital filters for sigma delta modulator +- Rich analog peripherals (independent supply) + - 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 μA/MSPS + - 2x 12-bit DAC, low-power sample and hold + - 2x operational amplifiers with built-in PGA + - 2x ultra-low-power comparators +- 18x communication interfaces + - USB OTG 2.0 full-speed, LPM and BCD + - 2x SAIs (serial audio interface) + - 3x I2C FM+(1 Mbit/s), SMBus/PMBus + - 6x USARTs (ISO 7816, LIN, IrDA, modem) + - 3x SPIs (4x SPIs with the Quad SPI) + - CAN (2.0B Active) and SDMMC interface + - SWPMI single wire protocol master I/F +- 14-channel DMA controller +- True random number generator +- CRC calculation unit, 96-bit unique ID +- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™ + + +More information about STM32L476RG can be found here: + - `STM32L475RG on www.st.com`_ + - `STM32L475 reference manual`_ + +Supported Features +================== + +The Zephyr Disco L475 IoT board configuration supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++-----------+------------+-------------------------------------+ +| PWM | on-chip | pwm | ++-----------+------------+-------------------------------------+ + +Other hardware features are not yet supported on this Zephyr port. + +The default configuration can be found in the defconfig file: + + ``boards/arm/disco_l475_iot1/disco_l475_iot1_defconfig`` + + +Connections and IOs +=================== + +Disco L475 IoT Board has 8 GPIO controllers. These controllers are responsible for pin muxing, +input/output, pull-up, etc. + +Available pins: +--------------- + +For detailed information about available pins please refer to `STM32 Disco L475 IoT1 board User Manual`_. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +- UART_1_TX : PB6 +- UART_1_RX : PB7 +- UART_2_TX : PA2 +- UART_2_RX : PA3 +- I2C_1_SCL : PB8 +- I2C_1_SDA : PB9 +- I2C_2_SCL : PB10 +- I2C_2_SDA : PB11 +- SPI_1_SCK : PA5 +- SPI_1_MISO : PA6 +- SPI_1_MOSI : PA7 +- PWM_2_CH1 : PA15 +- USER_PB : PC13 +- LD2 : PA5 + +System Clock +------------ + +Disco L475 IoT System Clock could be driven by internal or external oscillator, +as well as main PLL clock. By default System clock is driven by PLL clock at 80MHz, +driven by 16MHz high speed internal oscillator. + +Serial Port +----------- + +Disco L475 IoT board has 6 U(S)ARTs. The Zephyr console output is assigned to UART1. +Default settings are 115200 8N1. + + +Programming and Debugging +************************* + +Flashing +======== + +Disco L475 IoT board includes an ST-LINK/V2-1 embedded debug tool interface. +This interface is not supported by the openocd version 0.9 included by the Zephyr SDK v0.9. +Until we update the Zephyr SDK, use openocd v0.10.0 from the openocd-stm32 project on GitHub +to get the minimum set of scripts needed to flash and debug STM32 development boards. + +.. code-block:: console + + $ git clone https://github.com/erwango/openocd-stm32.git + +Then follow instructions in README.md + + +Flashing an application to Disco L475 IoT +----------------------------------------- + +The sample application :ref:`hello_world` is being used in this tutorial: + +To build the Zephyr kernel and application, enter: + +.. code-block:: console + + $ cd + $ source zephyr-env.sh + $ cd $ZEPHYR_BASE/samples/hello_world/ + $ make BOARD=disco_l475_iot1 + +Connect the Disco L475 IoT to your host computer using the USB port. +Then, enter the following command: + +.. code-block:: console + + $ cd + $ stm32_flsh l4 $ZEPHYR_BASE/samples/hello_world/outdir/disco_l475_iot1/zephyr.bin + +Run a serial host program to connect with your Nucleo board. + +.. code-block:: console + + $ minicom -D /dev/ttyACM0 + +You should see the following message: + +.. code-block:: console + + $ Hello World! arm + + +Debugging +========= + +Access gdb with the following make command: + +.. code-block:: console + + $ cd + $ stm32_dbg l4 $ZEPHYR_BASE/samples/hello_world/outdir/disco_l475_iot1/zephyr.elf + +.. _Disco L475 IoT1 website: + http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-discovery-kits/b-l475e-iot01a.html + +.. _STM32 Disco L475 IoT1 board User Manual: + http://www.st.com/resource/en/user_manual/dm00347848.pdf + +.. _STM32L475RG on www.st.com: + http://www.st.com/en/microcontrollers/stm32l475rg.html + +.. _STM32L475 reference manual: + http://www.st.com/resource/en/reference_manual/DM00031020.pdf diff --git a/boards/arm/disco_l475_iot1/doc/img/disco_l475_iot1.jpg b/boards/arm/disco_l475_iot1/doc/img/disco_l475_iot1.jpg new file mode 100644 index 00000000000..20b7f6e05be Binary files /dev/null and b/boards/arm/disco_l475_iot1/doc/img/disco_l475_iot1.jpg differ diff --git a/drivers/pinmux/Makefile b/drivers/pinmux/Makefile index 9ab0986e5c1..95f20ebbdc9 100644 --- a/drivers/pinmux/Makefile +++ b/drivers/pinmux/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_BOARD_NUCLEO_F401RE) += stm32/pinmux_board_nucleo_f401re.o obj-$(CONFIG_BOARD_NUCLEO_F411RE) += stm32/pinmux_board_nucleo_f411re.o obj-$(CONFIG_BOARD_96B_CARBON) += stm32/pinmux_board_carbon.o obj-$(CONFIG_BOARD_NUCLEO_L476RG) += stm32/pinmux_board_nucleo_l476rg.o +obj-$(CONFIG_BOARD_DISCO_L475_IOT1) += stm32/pinmux_board_disco_l475_iot1.o obj-$(CONFIG_BOARD_OLIMEXINO_STM32) += stm32/pinmux_board_olimexino_stm32.o obj-$(CONFIG_BOARD_STM32_MINI_A15) += stm32/pinmux_board_stm32_mini_a15.o obj-$(CONFIG_PINMUX_QMSI) += pinmux_qmsi.o diff --git a/drivers/pinmux/stm32/pinmux_board_disco_l475_iot1.c b/drivers/pinmux/stm32/pinmux_board_disco_l475_iot1.c new file mode 100644 index 00000000000..dac3fd41fde --- /dev/null +++ b/drivers/pinmux/stm32/pinmux_board_disco_l475_iot1.c @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2017 Linaro Limited + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include +#include "pinmux/pinmux.h" + +#include "pinmux_stm32.h" + +/* pin assignments for Disco L475 IOT1 board */ +static const struct pin_config pinconf[] = { +#ifdef CONFIG_UART_STM32_PORT_1 + {STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_USART1_TX}, + {STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_USART1_RX}, +#endif /* CONFIG_UART_STM32_PORT_1 */ +#ifdef CONFIG_I2C_1 + {STM32_PIN_PB8, STM32L4X_PINMUX_FUNC_PB8_I2C1_SCL}, + {STM32_PIN_PB9, STM32L4X_PINMUX_FUNC_PB9_I2C1_SDA}, +#endif /* CONFIG_I2C_1 */ +#ifdef CONFIG_I2C_2 + /* I2C2 is used for NFC, STSAFE, ToF & MEMS sensors */ + {STM32_PIN_PB10, STM32L4X_PINMUX_FUNC_PB10_I2C2_SCL}, + {STM32_PIN_PB11, STM32L4X_PINMUX_FUNC_PB11_I2C2_SDA}, +#endif /* CONFIG_I2C_2 */ +#ifdef CONFIG_SPI_1 + {STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK}, + {STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO}, + {STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI}, +#endif /* CONFIG_SPI_1 */ +#ifdef CONFIG_SPI_3 + /* SPI3 is used for BT/WIFI, Sub GHZ communication */ + {STM32_PIN_PC10, STM32L4X_PINMUX_FUNC_PC10_SPI3_SCK}, + {STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO}, + {STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI}, +#endif /* CONFIG_SPI_3 */ +#ifdef CONFIG_PWM_STM32_2 + {STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_PWM2_CH1}, +#endif /* CONFIG_PWM_STM32_2 */ +#ifdef CONFIG_USB_STM32 + {STM32_PIN_PA9, STM32L4X_PINMUX_FUNC_PA9_OTG_5V_VBUS}, + {STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_OTG_FS_ID}, + {STM32_PIN_PA11, STM32L4X_PINMUX_FUNC_PA11_OTG_FS_DM}, + {STM32_PIN_PA12, STM32L4X_PINMUX_FUNC_PA12_OTG_FS_DP}, +#endif /* CONFIG_USB_STM32 */ + +}; + +static int pinmux_stm32_init(struct device *port) +{ + ARG_UNUSED(port); + + stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf)); + + return 0; +} + +SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, + CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY); diff --git a/dts/arm/Makefile b/dts/arm/Makefile index 67d7c332d9a..e190276a923 100644 --- a/dts/arm/Makefile +++ b/dts/arm/Makefile @@ -1,4 +1,5 @@ ifeq ($(CONFIG_HAS_DTS),y) +dtb-$(CONFIG_BOARD_DISCO_L475_IOT1) = disco_l475_iot1.dts_compiled dtb-$(CONFIG_BOARD_FRDM_K64F) = frdm_k64f.dts_compiled dtb-$(CONFIG_BOARD_FRDM_KW41Z) = frdm_kw41z.dts_compiled dtb-$(CONFIG_BOARD_FRDM_KL25Z) = frdm_kl25z.dts_compiled diff --git a/dts/arm/disco_l475_iot1.dts b/dts/arm/disco_l475_iot1.dts new file mode 100644 index 00000000000..843f32c62d4 --- /dev/null +++ b/dts/arm/disco_l475_iot1.dts @@ -0,0 +1,24 @@ +/* + * Copyright (c) 2017 Linaro Limited + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include + +/ { + model = "STMicroelectronics B-L475E-IOT01Ax board"; + compatible = "st,stm32l475-disco-iot", "st,stm32l475"; + + chosen { + zephyr,console = &usart1; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + }; +}; + +&usart1 { + current-speed = <115200>; + status = "ok"; +}; diff --git a/dts/arm/disco_l475_iot1.fixup b/dts/arm/disco_l475_iot1.fixup new file mode 100644 index 00000000000..ac9af9a7608 --- /dev/null +++ b/dts/arm/disco_l475_iot1.fixup @@ -0,0 +1,32 @@ +/* This file is a temporary workaround for mapping of the generated information + * to the current driver definitions. This will be removed when the drivers + * are modified to handle the generated information, or the mapping of + * generated data matches the driver definitions. + */ + +#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS + +#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS +#define CONFIG_UART_STM32_PORT_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED +#define CONFIG_UART_STM32_PORT_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY +#define PORT_1_IRQ ST_STM32_USART_40013800_IRQ_0 + +#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS +#define CONFIG_UART_STM32_PORT_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED +#define CONFIG_UART_STM32_PORT_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY +#define PORT_2_IRQ ST_STM32_USART_40004400_IRQ_0 + +#define CONFIG_UART_STM32_PORT_3_BASE_ADDRESS ST_STM32_USART_40004800_BASE_ADDRESS +#define CONFIG_UART_STM32_PORT_3_BAUD_RATE ST_STM32_USART_40004800_CURRENT_SPEED +#define CONFIG_UART_STM32_PORT_3_IRQ_PRI ST_STM32_USART_40004800_IRQ_0_PRIORITY +#define PORT_3_IRQ ST_STM32_USART_40004800_IRQ_0 + +#define CONFIG_UART_STM32_PORT_4_BASE_ADDRESS ST_STM32_USART_40004C00_BASE_ADDRESS +#define CONFIG_UART_STM32_PORT_4_BAUD_RATE ST_STM32_USART_40004C00_CURRENT_SPEED +#define CONFIG_UART_STM32_PORT_4_IRQ_PRI ST_STM32_USART_40004C00_IRQ_0_PRIORITY +#define PORT_4_IRQ ST_STM32_USART_40004C00_IRQ_0 + +#define CONFIG_UART_STM32_PORT_5_BASE_ADDRESS ST_STM32_USART_40005000_BASE_ADDRESS +#define CONFIG_UART_STM32_PORT_5_BAUD_RATE ST_STM32_USART_40005000_CURRENT_SPEED +#define CONFIG_UART_STM32_PORT_5_IRQ_PRI ST_STM32_USART_40005000_IRQ_0_PRIORITY +#define PORT_5_IRQ ST_STM32_USART_40005000_IRQ_0 diff --git a/scripts/sanity_chk/arches/arm.ini b/scripts/sanity_chk/arches/arm.ini index 67902c4a56b..d77ff8a3aae 100644 --- a/scripts/sanity_chk/arches/arm.ini +++ b/scripts/sanity_chk/arches/arm.ini @@ -7,7 +7,7 @@ platforms = qemu_cortex_m3 frdm_k64f arduino_due nucleo_f103rb stm32_mini_a15 v2m_beetle nucleo_l476rg nrf52840_pca10056 nucleo_f411re stm3210c_eval nucleo_f334r8 stm32373c_eval mps2_an385 frdm_kw41z sam_e70_xplained curie_ble nrf52_blenano2 hexiwear_kw40z - cc3220sf_launchxl frdm_kl25z + cc3220sf_launchxl frdm_kl25z disco_l475_iot1 supported_toolchains = zephyr gccarmemb