diff --git a/soc/arm/nordic_nrf/nrf91/CMakeLists.txt b/soc/arm/nordic_nrf/nrf91/CMakeLists.txt
index 332416ba43b..e2cdaf798b7 100644
--- a/soc/arm/nordic_nrf/nrf91/CMakeLists.txt
+++ b/soc/arm/nordic_nrf/nrf91/CMakeLists.txt
@@ -3,3 +3,7 @@
 zephyr_sources(
   soc.c
   )
+
+zephyr_library_sources_ifdef(CONFIG_SYS_POWER_MANAGEMENT
+  power.c
+  )
diff --git a/soc/arm/nordic_nrf/nrf91/power.c b/soc/arm/nordic_nrf/nrf91/power.c
new file mode 100644
index 00000000000..8ba393350d1
--- /dev/null
+++ b/soc/arm/nordic_nrf/nrf91/power.c
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2017 Intel Corporation.
+ * Copytight (c) 2019 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#include <zephyr.h>
+#include <power/power.h>
+#include <hal/nrf_regulators.h>
+
+#include <logging/log.h>
+LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
+
+/* Invoke Low Power/System Off specific Tasks */
+void sys_set_power_state(enum power_states state)
+{
+	switch (state) {
+#ifdef CONFIG_SYS_POWER_DEEP_SLEEP_STATES
+ #ifdef CONFIG_HAS_SYS_POWER_STATE_DEEP_SLEEP_1
+	case SYS_POWER_STATE_DEEP_SLEEP_1:
+		nrf_regulators_system_off(NRF_REGULATORS);
+		break;
+ #endif
+#endif
+	default:
+		LOG_DBG("Unsupported power state %u", state);
+		break;
+	}
+}
+
+/* Handle SOC specific activity after Low Power Mode Exit */
+void _sys_pm_power_state_exit_post_ops(enum power_states state)
+{
+	switch (state) {
+#ifdef CONFIG_SYS_POWER_DEEP_SLEEP_STATES
+ #ifdef CONFIG_HAS_SYS_POWER_STATE_DEEP_SLEEP_1
+	case SYS_POWER_STATE_DEEP_SLEEP_1:
+		/* Nothing to do. */
+		break;
+ #endif
+#endif
+	default:
+		LOG_DBG("Unsupported power state %u", state);
+		break;
+	}
+
+	/*
+	 * System is now in active mode. Reenable interrupts which were disabled
+	 * when OS started idling code.
+	 */
+	irq_unlock(0);
+}
diff --git a/subsys/power/device.c b/subsys/power/device.c
index 6520683c0ae..3dde0396cf6 100644
--- a/subsys/power/device.c
+++ b/subsys/power/device.c
@@ -22,7 +22,7 @@ LOG_MODULE_DECLARE(power);
  * to build the device list based on devices power
  * and clock domain dependencies.
  */
-#if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF51X) || defined(CONFIG_SOC_SERIES_NRF53X)
+#if defined(CONFIG_SOC_FAMILY_NRF)
 #define MAX_PM_DEVICES	15
 #define NUM_CORE_DEVICES	4
 #define MAX_DEV_NAME_LEN	16