nios2: add minimal crt0.S

At the moment this just jumps into prep_c, with comments left
on other things that need to be done. Having this here ensures that
the early boot code isn't discarded by gc-sections.

vector_table.c removed, it isn't the right approach for this CPU.
Proper method for initializing reset and exception vectors still
being investigated.

Change-Id: Id7965c671f1a55c42ecfb65119497405a646bec4
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie 2016-05-03 11:47:01 -07:00 committed by Benjamin Walsh
commit 2d5645e57a
3 changed files with 53 additions and 26 deletions

View file

@ -2,8 +2,8 @@ ccflags-y += -I$(srctree)/kernel/nanokernel/include
ccflags-y +=-I$(srctree)/arch/$(ARCH)/include ccflags-y +=-I$(srctree)/arch/$(ARCH)/include
ccflags-y += -I$(srctree)/kernel/microkernel/include ccflags-y += -I$(srctree)/kernel/microkernel/include
obj-y += reset.o irq_manage.o fatal.o vector_table.o swap.o thread.o \ obj-y += reset.o irq_manage.o fatal.o swap.o thread.o \
cpu_idle.o irq_offload.o prep_c.o cpu_idle.o irq_offload.o prep_c.o crt0.o
obj-$(CONFIG_IRQ_OFFLOAD) += irq_offload.o obj-$(CONFIG_IRQ_OFFLOAD) += irq_offload.o

45
arch/nios2/core/crt0.S Normal file
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@ -0,0 +1,45 @@
/*
* Copyright (c) 2016 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#define _ASMLANGUAGE
#include <arch/nios2/asm.h>
/* exports */
GTEXT(__start)
/* imports */
GTEXT(_PrepC)
SECTION_FUNC(TEXT_START, __start)
/* TODO initialize instruction cache, if present */
/* TODO if shadow register sets enabled, ensure we are in set 0 */
/* TODO initialize data cache, if present */
/* TODO setup stack pointer */
/* TODO setup global pointer, if used */
/* TODO if shadow register sets enabled, interate through them to set
* up. Need to clear r0, write gp, set the execption stack pointer */
/* Jump into C domain. _PrepC zeroes BSS, copies rw data into RAM,
* and then enters nanokernel _Cstart */
call _PrepC

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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2016 Intel Corporation * Copyright (c) 2015 Intel Corporation
* *
* Licensed under the Apache License, Version 2.0 (the "License"); * Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License. * you may not use this file except in compliance with the License.
@ -14,31 +14,13 @@
* limitations under the License. * limitations under the License.
*/ */
#include <nano_private.h> #ifndef _NIOS2_ASM_H
#define _NIOS2_ASM_H
void __reset_handler(void) #include <toolchain.h>
{ #include <sections.h>
/* stub */
}
void __exception_handler(void)
{
/* stub */
}
struct vector_table {
uint32_t reset;
uint32_t exception;
};
/* FIXME not using CONFIG_RESET_VECTOR or CONFIG_EXCEPTION_VECTOR like we #endif
* should
*/
struct vector_table _vector_table _GENERIC_SECTION(.exc_vector_table) = {
(uint32_t)__reset_handler,
(uint32_t)__exception_handler
};
extern struct vector_table __start _ALIAS_OF(_vector_table);