bluetooth: controller: remove support for nRF5340 PDK

Remove support for nRF5340 PDK in the BLE controller.
The controller will now support only the nRF5340 DK.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos 2021-02-12 09:15:33 +01:00 committed by Anas Nashif
commit 2d32ca5e99
4 changed files with 7 additions and 25 deletions

View file

@ -606,7 +606,7 @@ endif # BT_CTLR
config BT_CTLR_DEBUG_PINS_CPUAPP config BT_CTLR_DEBUG_PINS_CPUAPP
bool "Bluetooth Controller Debug Pins" bool "Bluetooth Controller Debug Pins"
depends on BOARD_NRF5340PDK_NRF5340_CPUAPP || BOARD_NRF5340DK_NRF5340_CPUAPP depends on BOARD_NRF5340DK_NRF5340_CPUAPP
help help
Route debug GPIO toggling for the BLE Controller. Enable this when Route debug GPIO toggling for the BLE Controller. Enable this when
using Bluetooth Controller Debug Pins in co-processor and the main using Bluetooth Controller Debug Pins in co-processor and the main

View file

@ -658,7 +658,7 @@ config BT_CTLR_PROFILE_ISR
config BT_CTLR_DEBUG_PINS config BT_CTLR_DEBUG_PINS
bool "Bluetooth Controller Debug Pins" bool "Bluetooth Controller Debug Pins"
depends on BOARD_NRF51DK_NRF51422 || BOARD_NRF52DK_NRF52832 || BOARD_NRF52DK_NRF52810 || BOARD_NRF52840DK_NRF52840 || BOARD_NRF5340PDK_NRF5340_CPUNET || BOARD_NRF5340DK_NRF5340_CPUNET || BOARD_RV32M1_VEGA depends on BOARD_NRF51DK_NRF51422 || BOARD_NRF52DK_NRF52832 || BOARD_NRF52DK_NRF52810 || BOARD_NRF52840DK_NRF52840 || BOARD_NRF5340DK_NRF5340_CPUNET || BOARD_RV32M1_VEGA
help help
Turn on debug GPIO toggling for the BLE Controller. This is useful Turn on debug GPIO toggling for the BLE Controller. This is useful
when debugging with a logic analyzer or profiling certain sections of when debugging with a logic analyzer or profiling certain sections of

View file

@ -7,9 +7,7 @@
#if defined(CONFIG_BT_CTLR_DEBUG_PINS) || \ #if defined(CONFIG_BT_CTLR_DEBUG_PINS) || \
defined(CONFIG_BT_CTLR_DEBUG_PINS_CPUAPP) defined(CONFIG_BT_CTLR_DEBUG_PINS_CPUAPP)
#if defined(CONFIG_BOARD_NRF5340PDK_NRF5340_CPUAPP) || \ #if defined(CONFIG_BOARD_NRF5340DK_NRF5340_CPUAPP) || \
defined(CONFIG_BOARD_NRF5340PDK_NRF5340_CPUNET) || \
defined(CONFIG_BOARD_NRF5340DK_NRF5340_CPUAPP) || \
defined(CONFIG_BOARD_NRF5340DK_NRF5340_CPUNET) defined(CONFIG_BOARD_NRF5340DK_NRF5340_CPUNET)
#define DEBUG_PORT NRF_P1 #define DEBUG_PORT NRF_P1
#define DEBUG_PIN_IDX0 0 #define DEBUG_PIN_IDX0 0
@ -32,8 +30,7 @@
#define DEBUG_PIN7 BIT(DEBUG_PIN_IDX7) #define DEBUG_PIN7 BIT(DEBUG_PIN_IDX7)
#define DEBUG_PIN8 BIT(DEBUG_PIN_IDX8) #define DEBUG_PIN8 BIT(DEBUG_PIN_IDX8)
#define DEBUG_PIN9 BIT(DEBUG_PIN_IDX9) #define DEBUG_PIN9 BIT(DEBUG_PIN_IDX9)
#if defined(CONFIG_BOARD_NRF5340PDK_NRF5340_CPUAPP) || \ #if defined(CONFIG_BOARD_NRF5340DK_NRF5340_CPUAPP)
defined(CONFIG_BOARD_NRF5340DK_NRF5340_CPUAPP)
#define DEBUG_SETUP() \ #define DEBUG_SETUP() \
do { \ do { \
DEBUG_PORT->PIN_CNF[DEBUG_PIN_IDX0] = \ DEBUG_PORT->PIN_CNF[DEBUG_PIN_IDX0] = \
@ -67,7 +64,7 @@
(GPIO_PIN_CNF_MCUSEL_NetworkMCU << \ (GPIO_PIN_CNF_MCUSEL_NetworkMCU << \
GPIO_PIN_CNF_MCUSEL_Pos); \ GPIO_PIN_CNF_MCUSEL_Pos); \
} while (0) } while (0)
#endif /* CONFIG_BOARD_NRF5340PDK_NRF5340_CPUAPP */ #endif /* CONFIG_BOARD_NRF5340DK_NRF5340_CPUAPP */
#elif defined(CONFIG_BOARD_NRF52840DK_NRF52840) #elif defined(CONFIG_BOARD_NRF52840DK_NRF52840)
#define DEBUG_PORT NRF_P1 #define DEBUG_PORT NRF_P1
#define DEBUG_PIN0 BIT(1) #define DEBUG_PIN0 BIT(1)

View file

@ -21,8 +21,7 @@
#elif defined(CONFIG_SOC_SERIES_NRF53X) #elif defined(CONFIG_SOC_SERIES_NRF53X)
/* nRF53 Series Engineering D and Revision 1 IRQ mapping */ /* nRF53 Series Engineering D and Revision 1 IRQ mapping */
#if defined(CONFIG_SOC_NRF5340_CPUNET) && \ #if defined(CONFIG_SOC_NRF5340_CPUNET)
!defined(CONFIG_BOARD_NRF5340PDK_NRF5340_CPUNET)
#define HAL_SWI_RADIO_IRQ SWI2_IRQn #define HAL_SWI_RADIO_IRQ SWI2_IRQn
#define HAL_SWI_WORKER_IRQ RTC0_IRQn #define HAL_SWI_WORKER_IRQ RTC0_IRQn
@ -34,21 +33,7 @@
#define HAL_SWI_JOB_IRQ SWI3_IRQn #define HAL_SWI_JOB_IRQ SWI3_IRQn
#endif #endif
/* nRF53 Series Engineering A IRQ mapping */ #endif /* CONFIG_SOC_NRF5340_CPUNET */
#elif defined(CONFIG_BOARD_NRF5340PDK_NRF5340_CPUNET)
/* NOTE: nRF5340 Engineering A Errata [29] SWI: SWIRQ is not functional */
#define HAL_SWI_RADIO_IRQ EGU0_IRQn
#define HAL_SWI_WORKER_IRQ RTC0_IRQn
#if !defined(CONFIG_BT_CTLR_LOW_LAT) && \
(CONFIG_BT_CTLR_ULL_HIGH_PRIO == CONFIG_BT_CTLR_ULL_LOW_PRIO)
#define HAL_SWI_JOB_IRQ HAL_SWI_WORKER_IRQ
#else
#error "Use an unused IRQ line to implement a second SW IRQ."
#endif
#endif /* CONFIG_BOARD_NRF5340PDK_NRF5340_CPUNET */
#endif /* CONFIG_SOC_SERIES_NRF53X */ #endif /* CONFIG_SOC_SERIES_NRF53X */