drivers: spi: nrfx_spim: move rx delay to DT

Move the RX (MISO) delaying capability information to Devicetree. It is
done using 2 properties:

- rx-delay-supported: enabled on SPI nodes that support delaying RX.
  This property can be used by the driver to determine if this
  capability is supported or not on a given instance.
- rx-delay: the actual RX delay value

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas 2022-06-20 17:30:01 +02:00 committed by Marti Bolivar
commit 2cfb5012db
10 changed files with 38 additions and 26 deletions

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@ -117,32 +117,12 @@ config SPI_3_NRF_SPIS
Due to hardware limitations the implementation supports only simple Due to hardware limitations the implementation supports only simple
buffers (consisting of one part) located in RAM. buffers (consisting of one part) located in RAM.
config SPI_3_NRF_RX_DELAY
int "SPIM3 MISO sampling delay"
depends on SPI_3_NRF_SPIM && (SOC_NRF52833 || SOC_NRF52840)
range 0 7
default 2
help
Number of 64 MHz clock cycles (15.625 ns) delay from the sampling
edge of SCK (leading or trailing, depending on the CPHA setting used)
until the input serial data on MISO is actually sampled.
config SPI_4_NRF_SPIM config SPI_4_NRF_SPIM
def_bool HAS_HW_NRF_SPIM4 def_bool HAS_HW_NRF_SPIM4
select NRFX_SPIM4 select NRFX_SPIM4
help help
Enable nRF SPI Master with EasyDMA on port 4. Enable nRF SPI Master with EasyDMA on port 4.
config SPI_4_NRF_RX_DELAY
int "SPIM4 MISO sampling delay"
depends on SPI_4_NRF_SPIM && SOC_NRF5340_CPUAPP
range 0 7
default 2
help
Number of 64 MHz clock cycles (15.625 ns) delay from the sampling
edge of SCK (leading or trailing, depending on the CPHA setting used)
until the input serial data on MISO is actually sampled.
config SPI_NRFX_RAM_BUFFER_SIZE config SPI_NRFX_RAM_BUFFER_SIZE
int "Size of RAM buffers for SPIM peripherals" int "Size of RAM buffers for SPIM peripherals"
default 8 default 8

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@ -320,7 +320,6 @@ static int spi_nrfx_pm_action(const struct device *dev,
* Current factors requiring use of DT_NODELABEL: * Current factors requiring use of DT_NODELABEL:
* *
* - NRFX_SPI_INSTANCE() requires an SoC instance number * - NRFX_SPI_INSTANCE() requires an SoC instance number
* - soc-instance-numbered kconfig enables
*/ */
#define SPI(idx) DT_NODELABEL(spi##idx) #define SPI(idx) DT_NODELABEL(spi##idx)

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@ -507,8 +507,9 @@ static int spim_nrfx_pm_action(const struct device *dev,
#define SPI_NRFX_SPIM_EXTENDED_CONFIG(idx) \ #define SPI_NRFX_SPIM_EXTENDED_CONFIG(idx) \
IF_ENABLED(NRFX_SPIM_EXTENDED_ENABLED, \ IF_ENABLED(NRFX_SPIM_EXTENDED_ENABLED, \
(.dcx_pin = NRFX_SPIM_PIN_NOT_USED, \ (.dcx_pin = NRFX_SPIM_PIN_NOT_USED, \
IF_ENABLED(SPIM##idx##_FEATURE_RXDELAY_PRESENT, \ COND_CODE_1(SPIM_PROP(idx, rx_delay_supported), \
(.rx_delay = CONFIG_SPI_##idx##_NRF_RX_DELAY,)) \ (.rx_delay = SPIM_PROP(idx, rx_delay),), \
()) \
)) ))
#define SPI_NRFX_SPIM_PIN_CFG(idx) \ #define SPI_NRFX_SPIM_PIN_CFG(idx) \

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@ -505,6 +505,8 @@
reg = <0x4002f000 0x1000>; reg = <0x4002f000 0x1000>;
interrupts = <47 NRF_DEFAULT_IRQ_PRIORITY>; interrupts = <47 NRF_DEFAULT_IRQ_PRIORITY>;
max-frequency = <DT_FREQ_M(32)>; max-frequency = <DT_FREQ_M(32)>;
rx-delay-supported;
rx-delay = <2>;
status = "disabled"; status = "disabled";
label = "SPI_3"; label = "SPI_3";
}; };

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@ -511,6 +511,8 @@
reg = <0x4002f000 0x1000>; reg = <0x4002f000 0x1000>;
interrupts = <47 NRF_DEFAULT_IRQ_PRIORITY>; interrupts = <47 NRF_DEFAULT_IRQ_PRIORITY>;
max-frequency = <DT_FREQ_M(32)>; max-frequency = <DT_FREQ_M(32)>;
rx-delay-supported;
rx-delay = <2>;
status = "disabled"; status = "disabled";
label = "SPI_3"; label = "SPI_3";
}; };

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@ -139,6 +139,8 @@ spi4: spi@a000 {
reg = <0xa000 0x1000>; reg = <0xa000 0x1000>;
interrupts = <10 NRF_DEFAULT_IRQ_PRIORITY>; interrupts = <10 NRF_DEFAULT_IRQ_PRIORITY>;
max-frequency = <DT_FREQ_M(32)>; max-frequency = <DT_FREQ_M(32)>;
rx-delay-supported;
rx-delay = <2>;
status = "disabled"; status = "disabled";
label = "SPI_4"; label = "SPI_4";
}; };

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@ -25,3 +25,28 @@ properties:
Enables the workaround for the nRF52832 SoC SPIM PAN 58 anomaly. Enables the workaround for the nRF52832 SoC SPIM PAN 58 anomaly.
Must be used in conjunction with Must be used in conjunction with
CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58=y CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58=y
rx-delay-supported:
type: boolean
required: false
description: |
Indicates if the SPIM instance has the capability of delaying MISO
sampling. This property needs to be defined at SoC level DTS files.
rx-delay:
type: int
required: false
enum:
- 0
- 1
- 2
- 3
- 4
- 5
- 6
- 7
description: |
Number of 64 MHz clock cycles (15.625 ns) delay from the sampling edge
of SCK (leading or trailing, depending on the CPHA setting used) until
the input serial data on MISO is actually sampled. This property does
not have any effect if the rx-delay-supported property is not set.

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@ -7,6 +7,7 @@
#ifndef NRFX_CONFIG_H__ #ifndef NRFX_CONFIG_H__
#define NRFX_CONFIG_H__ #define NRFX_CONFIG_H__
#include <zephyr/devicetree.h>
/* /*
* These are mappings of Kconfig options enabling nrfx drivers and particular * These are mappings of Kconfig options enabling nrfx drivers and particular
@ -228,7 +229,8 @@
#ifdef CONFIG_NRFX_SPIM4 #ifdef CONFIG_NRFX_SPIM4
#define NRFX_SPIM4_ENABLED 1 #define NRFX_SPIM4_ENABLED 1
#endif #endif
#if defined(CONFIG_SPI_3_NRF_RX_DELAY) || defined(CONFIG_SPI_4_NRF_RX_DELAY) #if (DT_PROP(DT_NODELABEL(spi3), rx_delay_supported) || \
DT_PROP(DT_NODELABEL(spi4), rx_delay_supported))
#define NRFX_SPIM_EXTENDED_ENABLED 1 #define NRFX_SPIM_EXTENDED_ENABLED 1
#endif #endif

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@ -1,5 +1,3 @@
CONFIG_SPI_3_NRF_RX_DELAY=1
CONFIG_SPI_LOOPBACK_DRV_NAME="SPI_3" CONFIG_SPI_LOOPBACK_DRV_NAME="SPI_3"
CONFIG_SPI_LOOPBACK_CS_GPIO=y CONFIG_SPI_LOOPBACK_CS_GPIO=y
CONFIG_SPI_LOOPBACK_CS_CTRL_GPIO_DRV_NAME="GPIO_0" CONFIG_SPI_LOOPBACK_CS_CTRL_GPIO_DRV_NAME="GPIO_0"

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@ -6,4 +6,5 @@
&spi3 { &spi3 {
overrun-character = <0x00>; overrun-character = <0x00>;
rx-delay = <1>;
}; };