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drivers/interrupt_controller: Adding QI support in VT-D

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Looks like it's mandatory to invalidate the Interrupt Entry Cache in
VT-D and the only way to do so is to enable Queued Interface.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka 2021-01-12 14:03:04 +01:00 • committed by Anas Nashif
commit 2c904b379b
3 changed files with 174 additions and 1 deletions
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16
include/arch/x86/intel_vtd.h
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@ -140,6 +140,7 @@
#define VTD_FSTS_IQE BIT(4)
#define VTD_FSTS_ICE BIT(5)
#define VTD_FSTS_ITE BIT(6)
#define VTD_FSTS_FRI_POS 8
#define VTD_FSTS_FRI_MASK (0xF << VTD_FSTS_FRI_POS)
#define VTD_FSTS_FRI(status) \
@ -182,6 +183,21 @@
#define VTD_FRCD_FI_IR(fault) \
((fault & VTD_FRCD_FI_IR_MASK) >> VTD_FRCD_FI_IR_POS)
/* Invalidation Queue Address register details */
#define VTD_IQA_SIZE_MASK 0x7
#define VTD_IQA_WIDTH_128_BIT 0
#define VTD_IQA_WIDTH_256_BIT BIT(11)
#define VTD_IQA_REG_GEN_CONTENT(addr, width, size) \
((uint64_t)0 | (addr) | (width) | (size & VTD_IQA_SIZE_MASK))
/* Invalidation Queue Head register details */
#define VTD_IQH_QH_POS_128 4
#define VTD_IQH_QH_MASK ((uint64_t)0xEF << VTD_IQH_QH_POS_128)
/* Invalidation Queue Tail register details */
#define VTD_IQT_QT_POS_128 4
#define VTD_IQT_QT_MASK ((uint64_t)0xEF << VTD_IQT_QT_POS_128)
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_INCLUDE_ARCH_X86_INTEL_VTD_H */