soc: arm: nxp_imx: replaced CODE_LOCATION and added FLEXSPI_XIP to soc

Cleaning up the instances of CODE_LOCATION used in the soc
clock_init and replaced them with the Kconfig
FLASH_MCUX_FLEXSPI_XIP due to the correlation with
the flexspi clocks and the XIP feature of Flexspi.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>

boards/arm/mimxrt685_evk/Kconfig.defconfig

@@ -36,8 +36,4 @@ config HEAP_MEM_POOL_SIZE
 
 endif # DMA_MCUX_LPC
 
-choice CODE_LOCATION
-	default CODE_FLEXSPI
-endchoice
-
 endif # BOARD_MIMXRT685_EVK

soc/arm/nxp_imx/rt5xx/soc.c

@@ -18,10 +18,13 @@
 #include <zephyr/irq.h>
 #include <zephyr/linker/sections.h>
 #include <soc.h>
-#include "flash_clock_setup.h"
 #include "fsl_power.h"
 #include "fsl_clock.h"
 
+#ifdef CONFIG_FLASH_MCUX_FLEXSPI_XIP
+#include "flash_clock_setup.h"
+#endif
+
 #if CONFIG_USB_DC_NXP_LPCIP3511
 #include "usb_phy.h"
 #include "usb.h"
@@ -214,12 +217,14 @@ static void clock_init(void)
 	/* Enable all FRO outputs */
 	CLOCK_EnableFroClk(kCLOCK_FroAllOutEn);
 
+#ifdef CONFIG_FLASH_MCUX_FLEXSPI_XIP
 	/*
 	 * Call function flexspi_clock_safe_config() to move FlexSPI clock to a stable
 	 * clock source to avoid instruction/data fetch issue when updating PLL and Main
 	 * clock if XIP(execute code on FLEXSPI memory).
 	 */
 	flexspi_clock_safe_config();
+#endif
 
 	/* Let CPU run on FRO with divider 2 for safe switching. */
 	CLOCK_SetClkDiv(kCLOCK_DivSysCpuAhbClk, 2);
@@ -300,11 +305,13 @@ static void clock_init(void)
 	/* Set CLKOUTFCLKDIV divider to value 100 */
 	CLOCK_SetClkDiv(kCLOCK_DivClockOut, 100U);
 
+#ifdef CONFIG_FLASH_MCUX_FLEXSPI_XIP
 	/*
 	 * Call function flexspi_setup_clock() to set user configured clock source/divider
 	 * for FlexSPI.
 	 */
 	flexspi_setup_clock(FLEXSPI0, 0U, 2U);
+#endif
 
 	/* Set SystemCoreClock variable. */
 	SystemCoreClock = CLOCK_INIT_CORE_CLOCK;

soc/arm/nxp_imx/rt6xx/CMakeLists.txt

@@ -12,7 +12,7 @@ zephyr_sources_ifdef(CONFIG_PM
   power.c
   )
 
-zephyr_sources_ifdef(CONFIG_CODE_FLEXSPI
+zephyr_sources_ifdef(CONFIG_FLASH_MCUX_FLEXSPI_XIP
   flash_clock_setup.c
   )
 
@@ -29,6 +29,6 @@ zephyr_linker_sources_ifdef(CONFIG_NXP_IMX_RT6XX_BOOT_HEADER
 zephyr_linker_sources_ifdef(CONFIG_USB_DEVICE_DRIVER
   SECTIONS usb.ld)
 
-if(CONFIG_CODE_FLEXSPI)
+if(CONFIG_FLASH_MCUX_FLEXSPI_XIP)
 zephyr_code_relocate(flash_clock_setup.c RAM)
 endif()

soc/arm/nxp_imx/rt6xx/Kconfig.series

@@ -10,6 +10,6 @@ config SOC_SERIES_IMX_RT6XX
 	select CPU_CORTEX_M_HAS_DWT
 	select SOC_FAMILY_IMX
 	select CLOCK_CONTROL
-	select CODE_DATA_RELOCATION_SRAM if CODE_FLEXSPI
+	select CODE_DATA_RELOCATION_SRAM if FLASH_MCUX_FLEXSPI_XIP
 	help
 	  Enable support for i.MX RT6XX Series MCU series

soc/arm/nxp_imx/rt6xx/Kconfig.soc

@@ -109,11 +109,4 @@ config IMAGE_VECTOR_TABLE_OFFSET
 
 endif # NXP_IMX_RT6XX_BOOT_HEADER
 
-choice CODE_LOCATION
-	prompt "Code location selection"
-	default CODE_FLEXSPI
-config CODE_FLEXSPI
-	bool "Link code into external FlexSPI-controlled memory"
-endchoice
-
 endif # SOC_SERIES_IMX_RT6XX

soc/arm/nxp_imx/rt6xx/soc.c

@@ -25,7 +25,7 @@
 #include <fsl_common.h>
 #include <fsl_device_registers.h>
 
-#ifdef CONFIG_CODE_FLEXSPI
+#ifdef CONFIG_FLASH_MCUX_FLEXSPI_XIP
 #include "flash_clock_setup.h"
 #endif
 
@@ -195,7 +195,7 @@ static ALWAYS_INLINE void clock_init(void)
 	POWER_DisablePD(kPDRUNCFG_PD_SFRO);
 	CLOCK_EnableSfroClk();
 
-#ifdef CONFIG_CODE_FLEXSPI
+#ifdef CONFIG_FLASH_MCUX_FLEXSPI_XIP
 	/*
 	 * Call function flexspi_clock_safe_config() to move FlexSPI clock to a stable
 	 * clock source to avoid instruction/data fetch issue when updating PLL and Main
@@ -303,7 +303,7 @@ static ALWAYS_INLINE void clock_init(void)
 	CLOCK_AttachClk(kLPOSC_to_I3C_TC_CLK);
 #endif
 
-#ifdef CONFIG_CODE_FLEXSPI
+#ifdef CONFIG_FLASH_MCUX_FLEXSPI_XIP
 	/*
 	 * Call function flexspi_setup_clock() to set user configured clock source/divider
 	 * for FlexSPI.