tests: add a dma transfer test with different channel and burstlen
This TC cover dma transfer with different channel and burst length It support 2 ways to execute *) full-auto: by default, it run all sub test cases defined in array once flashing done and reset. *) interactive: when CONFIG_CONFIG_CONSOLE_HANDLER_SHELL=y, it go into shell first, user can input test command one by one for debugging. move original test under drivers/dma to test_loop_transfer/ Change-Id: I7e78b730592c80bf2c23b20c8b0eb65a9b353acd Signed-off-by: jing wang <jing.j.wang@intel.com>
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12 changed files with 216 additions and 0 deletions
4
tests/drivers/dma/test_chan_blen_transfer/Makefile
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4
tests/drivers/dma/test_chan_blen_transfer/Makefile
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BOARD ?= quark_se_c1000_devboard
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CONF_FILE = prj.conf # set prj_shell.conf if debugging tc
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include ${ZEPHYR_BASE}/Makefile.inc
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3
tests/drivers/dma/test_chan_blen_transfer/prj.conf
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3
tests/drivers/dma/test_chan_blen_transfer/prj.conf
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CONFIG_DMA=y
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CONFIG_DMA_QMSI=y
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CONFIG_ZTEST=y
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6
tests/drivers/dma/test_chan_blen_transfer/prj_shell.conf
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6
tests/drivers/dma/test_chan_blen_transfer/prj_shell.conf
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CONFIG_DMA=y
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CONFIG_DMA_QMSI=y
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CONFIG_ZTEST=y
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CONFIG_CONSOLE_HANDLER=y
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CONFIG_CONSOLE_HANDLER_SHELL=y
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CONFIG_ENABLE_SHELL=y
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2
tests/drivers/dma/test_chan_blen_transfer/src/Makefile
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2
tests/drivers/dma/test_chan_blen_transfer/src/Makefile
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include $(ZEPHYR_BASE)/tests/Makefile.test
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obj-y = main.o test_dma.o
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59
tests/drivers/dma/test_chan_blen_transfer/src/main.c
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59
tests/drivers/dma/test_chan_blen_transfer/src/main.c
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/*
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* Copyright (c) 2016 Intel Corporation
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @addtogroup t_driver_dma
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* @{
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* @defgroup t_dma_mem_to_mem test_dma_mem_to_mem
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* @}
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*/
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#include <zephyr.h>
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#include <ztest.h>
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extern void test_dma_m2m_chan0_burst8(void);
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extern void test_dma_m2m_chan1_burst8(void);
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extern void test_dma_m2m_chan0_burst16(void);
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extern void test_dma_m2m_chan1_burst16(void);
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#ifdef CONFIG_CONSOLE_HANDLER_SHELL
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TC_CMD_DEFINE(test_dma_m2m_chan0_burst8)
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TC_CMD_DEFINE(test_dma_m2m_chan1_burst8)
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TC_CMD_DEFINE(test_dma_m2m_chan0_burst16)
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TC_CMD_DEFINE(test_dma_m2m_chan1_burst16)
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#endif
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void test_main(void)
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{
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#ifdef CONFIG_CONSOLE_HANDLER_SHELL
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/* initialize shell commands */
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static const struct shell_cmd commands[] = {
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TC_CMD_ITEM(test_dma_m2m_chan0_burst8),
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TC_CMD_ITEM(test_dma_m2m_chan1_burst8),
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TC_CMD_ITEM(test_dma_m2m_chan0_burst16),
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TC_CMD_ITEM(test_dma_m2m_chan1_burst16),
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{ NULL, NULL }
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};
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SHELL_REGISTER("runtest", commands);
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#else
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ztest_test_suite(dma_m2m_test,
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ztest_unit_test(test_dma_m2m_chan0_burst8),
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ztest_unit_test(test_dma_m2m_chan1_burst8),
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ztest_unit_test(test_dma_m2m_chan0_burst16),
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ztest_unit_test(test_dma_m2m_chan1_burst16));
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ztest_run_test_suite(dma_m2m_test);
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#endif
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}
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131
tests/drivers/dma/test_chan_blen_transfer/src/test_dma.c
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tests/drivers/dma/test_chan_blen_transfer/src/test_dma.c
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/*
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* Copyright (c) 2016 Intel Corporation
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @addtogroup t_dma_mem_to_mem
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* @{
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* @defgroup t_dma_m2m_chan_burst test_dma_m2m_chan_burst
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* @brief TestPurpose: verify zephyr dma memory to memory transfer
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* @details
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* - Test Steps
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* -# Set dma channel configuration including source/dest addr, burstlen
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* -# Set direction memory-to-memory
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* -# Start transter
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* - Expected Results
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* -# Data is transferred correctly from src to dest
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* @}
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*/
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#include <zephyr.h>
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#include <dma.h>
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#include <ztest.h>
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#define DMA_DEVICE_NAME CONFIG_DMA_0_NAME
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#define RX_BUFF_SIZE (48)
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static const char tx_data[] = "It is harder to be kind than to be wise";
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static char rx_data[RX_BUFF_SIZE] = { 0 };
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static void test_done(struct device *dev, void *data)
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{
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TC_PRINT("DMA transfer done\n");
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}
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static void test_error(struct device *dev, void *data)
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{
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TC_PRINT("DMA transfer met an error\n");
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}
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static int test_task(uint32_t chan_id, uint32_t blen)
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{
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enum dma_burst_length burst_len = BURST_TRANS_LENGTH_1;
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struct dma_channel_config dma_chan_cfg = {0};
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struct dma_transfer_config dma_trans = {0};
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struct device *dma = device_get_binding(DMA_DEVICE_NAME);
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if (!dma) {
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TC_PRINT("Cannot get dma controller\n");
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return TC_FAIL;
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}
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switch (blen) {
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case 8:
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burst_len = BURST_TRANS_LENGTH_8;
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break;
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case 16:
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burst_len = BURST_TRANS_LENGTH_16;
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break;
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default:
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burst_len = BURST_TRANS_LENGTH_1;
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}
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dma_chan_cfg.channel_direction = MEMORY_TO_MEMORY;
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dma_chan_cfg.source_transfer_width = TRANS_WIDTH_8;
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dma_chan_cfg.destination_transfer_width = TRANS_WIDTH_8;
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dma_chan_cfg.source_burst_length = burst_len;
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dma_chan_cfg.destination_burst_length = burst_len;
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dma_chan_cfg.dma_transfer = test_done;
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dma_chan_cfg.dma_error = test_error;
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dma_chan_cfg.callback_data = (void *)&chan_id;
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TC_PRINT("Preparing DMA Controller: Chan_ID=%u, BURST_LEN=%u\n",
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chan_id, burst_len);
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if (dma_channel_config(dma, chan_id, &dma_chan_cfg)) {
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TC_PRINT("Error: configuration\n");
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return TC_FAIL;
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}
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TC_PRINT("Starting the transfer\n");
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dma_trans.block_size = strlen(tx_data);
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dma_trans.source_address = (uint32_t *)tx_data;
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dma_trans.destination_address = (uint32_t *)rx_data;
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if (dma_transfer_config(dma, chan_id, &dma_trans)) {
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TC_PRINT("ERROR: transfer\n");
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return TC_FAIL;
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}
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if (dma_transfer_start(dma, chan_id)) {
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TC_PRINT("ERROR: transfer\n");
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return TC_FAIL;
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}
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k_sleep(2000);
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TC_PRINT("%s\n", rx_data);
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if (strcmp(tx_data, rx_data) != 0)
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return TC_FAIL;
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return TC_PASS;
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}
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/* export test cases */
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void test_dma_m2m_chan0_burst8(void)
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{
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assert_true((test_task(0, 8) == TC_PASS), NULL);
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}
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void test_dma_m2m_chan1_burst8(void)
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{
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assert_true((test_task(1, 8) == TC_PASS), NULL);
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}
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void test_dma_m2m_chan0_burst16(void)
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{
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assert_true((test_task(0, 16) == TC_PASS), NULL);
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}
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void test_dma_m2m_chan1_burst16(void)
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{
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assert_true((test_task(1, 16) == TC_PASS), NULL);
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}
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11
tests/drivers/dma/test_chan_blen_transfer/testcase.ini
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11
tests/drivers/dma/test_chan_blen_transfer/testcase.ini
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[test_dma]
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tags = drivers
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arch_whitelist = x86
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platform_whitelist = quark_se_c1000_devboard arduino_101 quark_d2000_crb
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[test_dma_shell]
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tags = drivers
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build_only = true
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arch_whitelist = x86
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extra_args = CONF_FILE=prj_shell.conf
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platform_whitelist = quark_se_c1000_devboard arduino_101 quark_d2000_crb
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