diff --git a/dts/riscv/rv32m1_ri5cy.dtsi b/dts/riscv/rv32m1_ri5cy.dtsi index e02e9e54370..ac7b9d6bc80 100644 --- a/dts/riscv/rv32m1_ri5cy.dtsi +++ b/dts/riscv/rv32m1_ri5cy.dtsi @@ -93,17 +93,17 @@ &lptmr0 { interrupt-parent = <&intmux0_ch0>; - interrupts = ; + interrupts = <7>; }; &lptmr1 { interrupt-parent = <&intmux0_ch1>; - interrupts = ; + interrupts = <8>; }; &lptmr2 { interrupt-parent = <&intmux0_ch1>; - interrupts = ; + interrupts = <22>; }; &gpioa { @@ -113,22 +113,22 @@ &gpiob { interrupt-parent = <&intmux0_ch1>; - interrupts = ; + interrupts = <15>; }; &gpioc { interrupt-parent = <&intmux0_ch1>; - interrupts = ; + interrupts = <16>; }; &gpiod { interrupt-parent = <&intmux0_ch1>; - interrupts = ; + interrupts = <17>; }; &gpioe { interrupt-parent = <&intmux0_ch1>; - interrupts = ; + interrupts = <27>; }; &uart0 { @@ -138,17 +138,17 @@ &uart1 { interrupt-parent = <&intmux0_ch1>; - interrupts = ; + interrupts = <13>; }; &uart2 { interrupt-parent = <&intmux0_ch1>; - interrupts = ; + interrupts = <14>; }; &uart3 { interrupt-parent = <&intmux0_ch1>; - interrupts = ; + interrupts = <26>; }; &i2c0 { @@ -163,10 +163,10 @@ &i2c2 { interrupt-parent = <&intmux0_ch1>; - interrupts = ; + interrupts = <11>; }; &i2c3 { interrupt-parent = <&intmux0_ch1>; - interrupts = ; + interrupts = <24>; }; diff --git a/dts/riscv/rv32m1_zero_riscy.dtsi b/dts/riscv/rv32m1_zero_riscy.dtsi index c8a8cd64f11..7af2929336a 100644 --- a/dts/riscv/rv32m1_zero_riscy.dtsi +++ b/dts/riscv/rv32m1_zero_riscy.dtsi @@ -92,12 +92,12 @@ &lptmr0 { interrupt-parent = <&intmux1_ch0>; - interrupts = ; + interrupts = <6>; }; &lptmr1 { interrupt-parent = <&intmux1_ch0>; - interrupts = ; + interrupts = <7>; }; &lptmr2 { @@ -107,22 +107,22 @@ &gpioa { interrupt-parent = <&intmux1_ch0>; - interrupts = ; + interrupts = <25>; }; &gpiob { interrupt-parent = <&intmux1_ch0>; - interrupts = ; + interrupts = <26>; }; &gpioc { interrupt-parent = <&intmux1_ch0>; - interrupts = ; + interrupts = <27>; }; &gpiod { interrupt-parent = <&intmux1_ch0>; - interrupts = ; + interrupts = <28>; }; &gpioe { @@ -132,17 +132,17 @@ &uart0 { interrupt-parent = <&intmux1_ch0>; - interrupts = ; + interrupts = <21>; }; &uart1 { interrupt-parent = <&intmux1_ch0>; - interrupts = ; + interrupts = <22>; }; &uart2 { interrupt-parent = <&intmux1_ch0>; - interrupts = ; + interrupts = <23>; }; &uart3 { @@ -152,17 +152,17 @@ &i2c0 { interrupt-parent = <&intmux1_ch0>; - interrupts = ; + interrupts = <13>; }; &i2c1 { interrupt-parent = <&intmux1_ch0>; - interrupts = ; + interrupts = <14>; }; &i2c2 { interrupt-parent = <&intmux1_ch0>; - interrupts = ; + interrupts = <15>; }; &i2c3 { diff --git a/include/dt-bindings/interrupt-controller/openisa-intmux.h b/include/dt-bindings/interrupt-controller/openisa-intmux.h index 7ac9957c923..222ffe0043d 100644 --- a/include/dt-bindings/interrupt-controller/openisa-intmux.h +++ b/include/dt-bindings/interrupt-controller/openisa-intmux.h @@ -7,19 +7,6 @@ #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_OPENISA_INTMUX_H_ #define ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_OPENISA_INTMUX_H_ -/* - * Symbols for intmux channels, for DT readability when using - * INTMUX_LEVEL2_IRQ(). - */ -#define INTMUX_CH0 0 -#define INTMUX_CH1 1 -#define INTMUX_CH2 2 -#define INTMUX_CH3 3 -#define INTMUX_CH4 4 -#define INTMUX_CH5 5 -#define INTMUX_CH6 6 -#define INTMUX_CH7 7 - /* * Level 1 IRQ offsets for each INTMUX channel. */ @@ -32,12 +19,4 @@ #define INTMUX_CH6_IRQ 30 #define INTMUX_CH7_IRQ 31 -/* - * Multi-level IRQ number for a INTMUX channel/line interrupt. - * - * See gen_isr_tables.py for details. - */ -#define INTMUX_LEVEL2_IRQ(channel, line) \ - ((((line) + 1) << 8) | ((channel) + INTMUX_CH0_IRQ)) - #endif