boards: arm: Add support for 96Boards Argonkey Board

ArgonKey board is a 96boards sensor hub platform for all 96Boards
compliant family products. The ArgonKey packs a Cortex-M4 chip
together with a set of motion, environmental and ambiental sensors
and can be used as a development platform for many different
applications.

Signed-off-by: Armando Visconti <armando.visconti@st.com>

boards/arm/96b_argonkey/96b_argonkey.dts

@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2018 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <st/stm32f412.dtsi>
+
+/ {
+	model = "Tocoding Argonkey 96boards";
+	compatible = "tocoding,argonkey", "st,stm32f412";
+
+	chosen {
+		zephyr,console = &usart1;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+	};
+};
+
+&usart1 {
+	current-speed = <115200>;
+	pinctrl-0 = <&usart1_pins_b>;
+	pinctrl-names = "default";
+	status = "ok";
+};
+
+&spi2 {
+	status = "ok";
+};
+
+&i2c1 {
+	status = "ok";
+	clock-frequency = <I2C_BITRATE_FAST>;
+};
+
+&i2c2 {
+	status = "ok";
+	clock-frequency = <I2C_BITRATE_FAST>;
+};
+
+&i2c3 {
+	status = "ok";
+	clock-frequency = <I2C_BITRATE_STANDARD>;
+};

boards/arm/96b_argonkey/96b_argonkey.yaml

@@ -0,0 +1,7 @@
+identifier: 96b_argonkey
+name: 96Boards Argonkey
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gccarmemb

boards/arm/96b_argonkey/96b_argonkey_defconfig

@@ -0,0 +1,49 @@
+CONFIG_ARM=y
+CONFIG_BOARD_96B_ARGONKEY=y
+CONFIG_SOC_SERIES_STM32F4X=y
+CONFIG_SOC_STM32F412CG=y
+CONFIG_CORTEX_M_SYSTICK=y
+
+# 84MHz system clock
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
+
+# enable uart driver
+CONFIG_SERIAL=y
+
+# enable pinmux
+CONFIG_PINMUX=y
+
+# enable GPIO
+CONFIG_GPIO=y
+
+# enable I2C
+CONFIG_I2C=y
+
+# enable SPI
+CONFIG_SPI=y
+
+# clock configuration
+CONFIG_CLOCK_CONTROL=y
+
+# SYSCLK selection
+CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
+
+# PLL configuration
+CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
+CONFIG_CLOCK_STM32_HSE_CLOCK=16000000
+
+# produce 84MHz clock at PLL output
+CONFIG_CLOCK_STM32_PLL_M_DIVISOR=8
+CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=84
+CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2
+CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=8
+CONFIG_CLOCK_STM32_AHB_PRESCALER=1
+
+# APB1 clock must not exceed 50MHz limit
+CONFIG_CLOCK_STM32_APB1_PRESCALER=2
+CONFIG_CLOCK_STM32_APB2_PRESCALER=1
+
+# console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y

boards/arm/96b_argonkey/CMakeLists.txt

@@ -0,0 +1,3 @@
+zephyr_library()
+zephyr_library_sources(pinmux.c)
+zephyr_library_include_directories(${PROJECT_SOURCE_DIR}/drivers)

boards/arm/96b_argonkey/Kconfig.board

@@ -0,0 +1,9 @@
+# Kconfig - 96Boards Argonkey Board Configuration
+#
+# Copyright (c) 2018 STMicroelectronics
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+config BOARD_96B_ARGONKEY
+	bool "96Boards Argonkey"
+	depends on SOC_STM32F412CG

boards/arm/96b_argonkey/Kconfig.defconfig

@@ -0,0 +1,40 @@
+# Kconfig - 96Boards Argonkey Board Configuration
+#
+# Copyright (c) 2018 STMicroelectronics
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if BOARD_96B_ARGONKEY
+
+config BOARD
+	default 96b_argonkey
+
+if UART_CONSOLE
+
+config UART_STM32_PORT_1
+	default y
+
+endif # UART_CONSOLE
+
+if I2C
+
+config I2C_1
+	default y
+
+config I2C_2
+	default y
+
+config I2C_3
+	default y
+
+endif # I2C
+
+if SPI
+
+config SPI_2
+	default y
+
+endif # SPI
+
+endif # BOARD_96B_ARGONKEY

boards/arm/96b_argonkey/board.h

@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2018 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __INC_BOARD_H
+#define __INC_BOARD_H
+
+#include <soc.h>
+
+/* USER push button */
+#define USER_PB_GPIO_PORT "GPIOA"
+#define USER_PB_GPIO_PIN   2
+
+/* LED 1 */
+#define USR1_GPIO_PIN     2
+#define USR1_GPIO_PORT    "GPIOB"
+
+/* LED 0 */
+#define USR0_GPIO_PIN     13
+#define USR0_GPIO_PORT    "GPIOC"
+
+/* Aliases to make the basic LED samples work */
+#define SW0_GPIO_NAME     USER_PB_GPIO_PORT
+#define SW0_GPIO_PIN      USER_PB_GPIO_PIN
+#define LED0_GPIO_PIN     USR0_GPIO_PIN
+#define LED0_GPIO_PORT    USR0_GPIO_PORT
+#define LED1_GPIO_PIN     USR1_GPIO_PIN
+#define LED1_GPIO_PORT    USR1_GPIO_PORT
+
+#endif /* __INC_BOARD_H */

boards/arm/96b_argonkey/doc/96b_argonkey.rst

@@ -0,0 +1,173 @@
+.. _96b_argonkey:
+
+96Boards Argonkey
+#################
+
+Overview
+********
+
+96Boards Argonkey board is based on the ST Microelectronics STM32F412CG
+Cortex M4 CPU. Zephyr applications use the 96b_argonkey configuration
+to run on these boards.
+
+This board acts as a sensor hub platform for all 96Boards compliant
+family products. It can also be used as a standalone board.
+
+.. figure:: img/96b-argonkey-front.jpg
+     :width: 557px
+     :align: center
+     :height: 480px
+     :alt: 96Boards Argonkey
+
+     96Boards Argonkey
+
+Hardware
+********
+
+96Boards Argonkey provides the following hardware components:
+
+- STM32F412CG in UFQFPN48 package
+- ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU
+- 100 MHz max CPU frequency
+- 1.8V work voltage
+- 1024 KB Flash
+- 256 KB SRAM
+- On board sensors:
+
+  - Humidity: STMicro HTS221
+  - Temperature/Pressure: STMicro LPS22HB
+  - ALS: Intersil ISL29034
+  - Proximity: STMicro VL53L0X
+  - Acclerometer/Gyroscope: STMicro LSM6DSL
+  - Geomagnetic: STMicro LIS2MDL
+  - AMR Hall sensor: MRMS501A
+  - Microphone: STMicro MP34DT05
+
+- 2 User LEDs
+- 16 General purpose LEDs
+- GPIO with external interrupt capability
+- UART
+- I2C (3)
+- SPI (1)
+- I2S (1)
+
+Supported Features
+==================
+
+The Zephyr 96b_argonkey board configuration supports the following hardware
+features:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| SYSTICK   | on-chip    | system clock                        |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial port                         |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+| PINMUX    | on-chip    | pinmux                              |
++-----------+------------+-------------------------------------+
+| FLASH     | on-chip    | flash                               |
++-----------+------------+-------------------------------------+
+| SPI       | on-chip    | spi                                 |
++-----------+------------+-------------------------------------+
+| I2C       | on-chip    | i2c                                 |
++-----------+------------+-------------------------------------+
+
+The default board configuration can be found in the defconfig file:
+
+        ``boards/arm/96b_argonkey/96b_argonkey_defconfig``
+
+Connections and IOs
+===================
+
+LED
+---
+
+- LED1 / User1 LED = PB2
+- LED2 / User2 LED = PC13
+
+Push buttons
+------------
+
+- BUTTON = RST (BT1)
+- BUTTON = USR (BT2)
+
+System Clock
+============
+
+96Boards Argonkey can be driven by an internal oscillator as well as the main
+PLL clock. In default board configuration, the 16MHz external oscillator is
+used to drive the main PLL clock to generate a System Clock (SYSCLK) at 84MHz.
+On the bus side, AHB and APB2 clock runs at 84MHz, while APB1 runs at 42MHz.
+
+Serial Port
+===========
+
+On 96Boards Argonkey, Zephyr console output is assigned to USART1.
+Default settings are 115200 8N1.
+
+I2C
+---
+
+96Boards Argonkey board has up to 3 I2Cs. The default I2C mapping is:
+
+- I2C1_SCL  : PB6
+- I2C1_SDA  : PB7
+- I2C2_SCL  : PB10
+- I2C2_SDA  : PB9
+- I2C3_SCL  : PA8
+- I2C3_SCL  : PB4
+
+I2C3 goes to the P2 connector and can be used to attach external sensors.
+It goes to 100kbit maximum.
+
+SPI
+---
+96Boards Argonkey board has 2 SPIs. SPI1 is used in slave mode as the communication
+bus with the AP. SPI2 is used in master mode to control the LSM6DSL sensor.
+The default SPI mapping is:
+
+- SPI1_NSS  : PA4
+- SPI1_SCK  : PA5
+- SPI1_MISO : PA6
+- SPI1_MOSI : PA7
+- SPI2_NSS  : PB12
+- SPI2_SCK  : PB13
+- SPI2_MISO : PB14
+- SPI2_MOSI : PB15
+
+Programming and Debugging
+*************************
+
+Building
+========
+
+Here is an example for building the :ref:`hello_world` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: 96b_argonkey
+   :goals: build
+
+Flashing
+========
+
+96Boards Argonkey can be flashed by two methods, one using the ROM
+bootloader and another using the SWD debug port (which requires additional
+hardware).
+
+Using ROM bootloader:
+---------------------
+
+Using SWD debugger:
+-------------------
+
+Debugging
+=========
+
+References
+**********

boards/arm/96b_argonkey/pinmux.c

@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2018 STMicroelectronics.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <kernel.h>
+#include <device.h>
+#include <init.h>
+#include <pinmux.h>
+#include <sys_io.h>
+
+#include <pinmux/stm32/pinmux_stm32.h>
+
+/* pin assignments for 96boards Argonkey board */
+static const struct pin_config pinconf[] = {
+#ifdef CONFIG_UART_STM32_PORT_1
+	{STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX},
+	{STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX},
+#endif	/* CONFIG_UART_STM32_PORT_1 */
+#ifdef CONFIG_I2C_1
+	{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_I2C1_SCL},
+	{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_I2C1_SDA},
+#endif /* CONFIG_I2C_1 */
+#ifdef CONFIG_I2C_2
+	{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL},
+	{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C2_SDA},
+#endif /* CONFIG_I2C_2 */
+#ifdef CONFIG_I2C_3
+	{STM32_PIN_PA8, STM32F4_PINMUX_FUNC_PA8_I2C3_SCL},
+	{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA},
+#endif /* CONFIG_I2C_3 */
+#ifdef CONFIG_SPI_1
+	{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
+	{STM32_PIN_PA5, STM32F4_PINMUX_FUNC_PA5_SPI1_SCK},
+	{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
+	{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
+#endif	/* CONFIG_SPI_1 */
+#ifdef CONFIG_SPI_2
+	{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS},
+	{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK},
+	{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
+	{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},
+#endif	/* CONFIG_SPI_2 */
+};
+
+static int pinmux_stm32_init(struct device *port)
+{
+	ARG_UNUSED(port);
+
+	stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
+
+	return 0;
+}
+
+SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
+		CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);