boards: arm: mimxrt1064_evk: correct PWDN pin of the CSI interface
according to schematics and NXP's sample code, the correct PIN for the PWDN pin is iomuxc_gpio_ad_b1_02_gpio1_io18 Signed-off-by: Michele Balistreri <michele@bitgamma.com>
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@ -24,7 +24,7 @@
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/* conflicts with lpuart3 and flexcan1 */
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pinmux_csi: pinmux_csi {
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group0 {
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pinmux = <&iomuxc_gpio_ad_b0_04_gpio1_io04>;
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pinmux = <&iomuxc_gpio_ad_b1_02_gpio1_io18>;
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drive-strength = "r0-6";
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bias-pull-down;
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bias-pull-down-value = "100k";
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