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boards: arm: mimxrt1064_evk: correct PWDN pin of the CSI interface

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according to schematics and NXP's sample code, the correct PIN for the
PWDN pin is iomuxc_gpio_ad_b1_02_gpio1_io18

Signed-off-by: Michele Balistreri <michele@bitgamma.com>
This commit is contained in:
Michele Balistreri 2022-12-29 12:14:35 +01:00 • committed by David Leach
commit 2bcfd4f7e3
1 changed files with 1 additions and 1 deletions
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2
boards/arm/mimxrt1064_evk/mimxrt1064_evk-pinctrl.dtsi
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@ -24,7 +24,7 @@
/* conflicts with lpuart3 and flexcan1 */ /* conflicts with lpuart3 and flexcan1 */
pinmux_csi: pinmux_csi { pinmux_csi: pinmux_csi {
group0 { group0 {
pinmux = <&iomuxc_gpio_ad_b0_04_gpio1_io04>; pinmux = <&iomuxc_gpio_ad_b1_02_gpio1_io18>;
drive-strength = "r0-6"; drive-strength = "r0-6";
bias-pull-down; bias-pull-down;
bias-pull-down-value = "100k"; bias-pull-down-value = "100k";