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soc: nxp_kinetis: Make kinetis flash configuration field configurable

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Kinetis SoCs have a 16-byte flash configuration field that must be
loaded at a specific address in flash. This field is not needed if we
are building an image to be chainloaded by MCUboot or a RAM-only image,
so we can exlude it in these cases and recover some wasted flash.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
Maureen Helm 2019-09-11 15:05:35 -05:00 • committed by Kumar Gala
commit 2bc700f66e
7 changed files with 20 additions and 92 deletions
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9
include/arch/arm/cortex_m/scripts/linker.ld
View file

@ -36,10 +36,6 @@
#define _DATA_IN_ROM #define _DATA_IN_ROM
#endif #endif
#if !defined(SKIP_TO_KINETIS_FLASH_CONFIG)
#define SKIP_TO_KINETIS_FLASH_CONFIG
#endif
#if !defined(CONFIG_XIP) && (CONFIG_FLASH_SIZE == 0) #if !defined(CONFIG_XIP) && (CONFIG_FLASH_SIZE == 0)
#define ROM_ADDR RAM_ADDR #define ROM_ADDR RAM_ADDR
#else #else
@ -177,10 +173,11 @@ SECTIONS
KEEP(*(.openocd_dbg)) KEEP(*(.openocd_dbg))
KEEP(*(".openocd_dbg.*")) KEEP(*(".openocd_dbg.*"))
/* Kinetis has to write 16 bytes at 0x400 */ #ifdef CONFIG_KINETIS_FLASH_CONFIG
SKIP_TO_KINETIS_FLASH_CONFIG . = CONFIG_KINETIS_FLASH_CONFIG_OFFSET;
KEEP(*(.kinetis_flash_config)) KEEP(*(.kinetis_flash_config))
KEEP(*(".kinetis_flash_config.*")) KEEP(*(".kinetis_flash_config.*"))
#endif
_vector_end = .; _vector_end = .;
} GROUP_LINK_IN(ROMABLE_REGION) } GROUP_LINK_IN(ROMABLE_REGION)

17
soc/arm/nxp_kinetis/Kconfig
View file

@ -107,4 +107,21 @@ config MCG_FRDIV
kHz. kHz.
endif # HAS_MCG endif # HAS_MCG
config KINETIS_FLASH_CONFIG
bool "Kinetis flash configuration field"
default y if XIP && !BOOTLOADER_MCUBOOT
help
Include the 16-byte flash configuration field that stores default
protection settings (loaded on reset) and security information that
allows the MCU to restrict access to the FTFx module.
if KINETIS_FLASH_CONFIG
config KINETIS_FLASH_CONFIG_OFFSET
hex "Kinetis flash configuration field offset"
default 0x400
endif # KINETIS_FLASH_CONFIG
endif # SOC_FAMILY_KINETIS endif # SOC_FAMILY_KINETIS

17
soc/arm/nxp_kinetis/k6x/linker.ld
View file

@ -11,21 +11,4 @@
* This is the linker script for both standard images and XIP images. * This is the linker script for both standard images and XIP images.
*/ */
#include <autoconf.h>
/*
* K64F Flash configuration fields
* These are 16 bytes, which must be loaded to address 0x400, and include
* default protection and security settings.
* They are loaded at reset to various Flash Memory module (FTFE) registers.
*/
/*
* No need to account for this when running a RAM-only image since that
* security feature resides in ROM.
*/
#if defined(CONFIG_XIP)
#define SKIP_TO_KINETIS_FLASH_CONFIG . = 0x400;
#endif
#include <arch/arm/cortex_m/scripts/linker.ld> #include <arch/arm/cortex_m/scripts/linker.ld>

18
soc/arm/nxp_kinetis/k8x/linker.ld
View file

@ -11,22 +11,4 @@
* This is the linker script for both standard images and XIP images. * This is the linker script for both standard images and XIP images.
*/ */
#include <autoconf.h>
/*
* K8x Flash configuration fields
* These are 16 bytes, which must be loaded to flash at offset 0x400, and
* include default protection and security settings.
* They are loaded at reset to various Flash Memory module (FTFA) registers.
*/
/*
* No need to account for this when running a RAM-only image since that
* security feature resides in ROM. There is also no need to account for this
* when building an image to be chainloaded by MCUboot.
*/
#if defined(CONFIG_XIP) && !defined(CONFIG_BOOTLOADER_MCUBOOT)
#define SKIP_TO_KINETIS_FLASH_CONFIG . = 0x400;
#endif
#include <arch/arm/cortex_m/scripts/linker.ld> #include <arch/arm/cortex_m/scripts/linker.ld>

17
soc/arm/nxp_kinetis/ke1xf/linker.ld
View file

@ -11,21 +11,4 @@
* This is the linker script for both standard images and XIP images. * This is the linker script for both standard images and XIP images.
*/ */
#include <autoconf.h>
/*
* KE1xF Flash configuration fields
* These are 16 bytes, which must be loaded to address 0x400, and include
* default protection and security settings.
* They are loaded at reset to various Flash Memory module (FTFE) registers.
*/
/*
* No need to account for this when running a RAM-only image since that
* security feature resides in ROM.
*/
#if defined(CONFIG_XIP)
#define SKIP_TO_KINETIS_FLASH_CONFIG . = 0x400;
#endif
#include <arch/arm/cortex_m/scripts/linker.ld> #include <arch/arm/cortex_m/scripts/linker.ld>

17
soc/arm/nxp_kinetis/kl2x/linker.ld
View file

@ -11,21 +11,4 @@
* This is the linker script for both standard images and XIP images. * This is the linker script for both standard images and XIP images.
*/ */
#include <autoconf.h>
/*
* KL25Z Flash configuration fields
* These are 16 bytes, which must be loaded to address 0x400, and include
* default protection and security settings.
* They are loaded at reset to various Flash Memory module (FTFE) registers.
*/
/*
* No need to account for this when running a RAM-only image since that
* security feature resides in ROM.
*/
#if defined(CONFIG_XIP)
#define SKIP_TO_KINETIS_FLASH_CONFIG . = 0x400;
#endif
#include <arch/arm/cortex_m/scripts/linker.ld> #include <arch/arm/cortex_m/scripts/linker.ld>

17
soc/arm/nxp_kinetis/kwx/linker.ld
View file

@ -11,21 +11,4 @@
* This is the linker script for both standard images and XIP images. * This is the linker script for both standard images and XIP images.
*/ */
#include <autoconf.h>
/*
* KW41Z Flash configuration fields
* These are 16 bytes, which must be loaded to address 0x400, and include
* default protection and security settings.
* They are loaded at reset to various Flash Memory module (FTFE) registers.
*/
/*
* No need to account for this when running a RAM-only image since that
* security feature resides in ROM.
*/
#if defined(CONFIG_XIP)
#define SKIP_TO_KINETIS_FLASH_CONFIG . = 0x400;
#endif
#include <arch/arm/cortex_m/scripts/linker.ld> #include <arch/arm/cortex_m/scripts/linker.ld>