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soc: riscv32: sifive-freedom: soc.h: use defines from device tree

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Use values generated from the device tree in RISCV_ROM_BASE,
RISCV_ROM_SIZE, RISCV_RAM_BASE, RISCV_RAM_SIZE macros.

Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This commit is contained in:
Filip Kokosinski 2019-04-30 10:27:02 +02:00 • committed by Maureen Helm
commit 2b61c37d04
1 changed files with 3 additions and 2 deletions
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5
soc/riscv32/riscv-privilege/sifive-freedom/soc.h
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@ -12,6 +12,7 @@
#define __RISCV32_SIFIVE_FREEDOM_SOC_H_ #define __RISCV32_SIFIVE_FREEDOM_SOC_H_
#include <soc_common.h> #include <soc_common.h>
#include <generated_dts_board.h>
/* PINMUX Configuration */ /* PINMUX Configuration */
#define SIFIVE_PINMUX_0_BASE_ADDR (DT_SIFIVE_GPIO_0_BASE_ADDR + 0x38) #define SIFIVE_PINMUX_0_BASE_ADDR (DT_SIFIVE_GPIO_0_BASE_ADDR + 0x38)
@ -40,7 +41,7 @@
#define SIFIVE_BACKUP_REG_BASE 0x10000080 #define SIFIVE_BACKUP_REG_BASE 0x10000080
/* lib-c hooks required RAM defined variables */ /* lib-c hooks required RAM defined variables */
#define RISCV_RAM_BASE CONFIG_RISCV_RAM_BASE_ADDR #define RISCV_RAM_BASE DT_SRAM_BASE_ADDRESS
#define RISCV_RAM_SIZE CONFIG_RISCV_RAM_SIZE #define RISCV_RAM_SIZE KB(DT_SRAM_SIZE)
#endif /* __RISCV32_SIFIVE_FREEDOM_SOC_H_ */ #endif /* __RISCV32_SIFIVE_FREEDOM_SOC_H_ */