gpio: avoid disabling interrupts when supporting legacy code
gpio_pin_interrupt_configure() is invoked from within gpio_pin_configure() to support legacy code that combines pin and interrupt configuration. Expressing a disabled interrupt by a zero value for interrupt flags causes this invocation to disable interrupts when the intent is to change only a pin configuration, such as pull direction. Support a distinction between explicitly disabling interrupts and leaving the interrupt configuration unchanged. Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
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2 changed files with 21 additions and 13 deletions
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@ -76,19 +76,19 @@ extern "C" {
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*/
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/** Disables GPIO pin interrupt. */
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#define GPIO_INT_DISABLE (0U << 12)
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#define GPIO_INT_DISABLE (1U << 12)
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/** @cond INTERNAL_HIDDEN */
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/* Enables GPIO pin interrupt. */
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#define GPIO_INT_ENABLE (1U << 12)
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#define GPIO_INT_ENABLE (1U << 13)
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/* GPIO interrupt is sensitive to logical levels.
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*
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* This is a component flag that should be combined with other
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* `GPIO_INT_*` flags to produce a meaningful configuration.
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*/
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#define GPIO_INT_LEVELS_LOGICAL (1U << 13)
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#define GPIO_INT_LEVELS_LOGICAL (1U << 14)
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/* GPIO interrupt is edge sensitive.
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*
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@ -97,7 +97,7 @@ extern "C" {
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* This is a component flag that should be combined with other
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* `GPIO_INT_*` flags to produce a meaningful configuration.
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*/
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#define GPIO_INT_EDGE (1U << 14)
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#define GPIO_INT_EDGE (1U << 15)
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/* Trigger detection when input state is (or transitions to) physical low or
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* logical 0 level.
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@ -105,7 +105,7 @@ extern "C" {
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* This is a component flag that should be combined with other
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* `GPIO_INT_*` flags to produce a meaningful configuration.
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*/
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#define GPIO_INT_LOW_0 (1U << 15)
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#define GPIO_INT_LOW_0 (1U << 16)
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/* Trigger detection on input state is (or transitions to) physical high or
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* logical 1 level.
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@ -113,7 +113,7 @@ extern "C" {
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* This is a component flag that should be combined with other
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* `GPIO_INT_*` flags to produce a meaningful configuration.
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*/
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#define GPIO_INT_HIGH_1 (1U << 16)
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#define GPIO_INT_HIGH_1 (1U << 17)
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/** @endcond */
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@ -187,7 +187,7 @@ extern "C" {
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* @note Drivers that do not support a debounce feature should ignore
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* this flag rather than rejecting the configuration with -ENOTSUP.
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*/
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#define GPIO_INT_DEBOUNCE (1U << 17)
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#define GPIO_INT_DEBOUNCE (1U << 18)
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/**
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* @name GPIO drive strength flags
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@ -212,7 +212,7 @@ extern "C" {
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* @{
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*/
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/** @cond INTERNAL_HIDDEN */
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#define GPIO_DS_LOW_POS 18
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#define GPIO_DS_LOW_POS 19
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#define GPIO_DS_LOW_MASK (0x3U << GPIO_DS_LOW_POS)
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/** @endcond */
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@ -227,7 +227,7 @@ extern "C" {
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#define GPIO_DS_ALT_LOW (0x1U << GPIO_DS_LOW_POS)
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/** @cond INTERNAL_HIDDEN */
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#define GPIO_DS_HIGH_POS 20
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#define GPIO_DS_HIGH_POS 21
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#define GPIO_DS_HIGH_MASK (0x3U << GPIO_DS_HIGH_POS)
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/** @endcond */
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@ -611,6 +611,13 @@ static inline int z_impl_gpio_pin_interrupt_configure(struct device *port,
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__ASSERT_NO_MSG((flags & GPIO_INT_DEBOUNCE) == 0);
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__ASSERT((flags & (GPIO_INT_DISABLE | GPIO_INT_ENABLE))
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!= (GPIO_INT_DISABLE | GPIO_INT_ENABLE),
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"Cannot both enable and disable interrupts");
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__ASSERT((flags & (GPIO_INT_DISABLE | GPIO_INT_ENABLE)) != 0U,
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"Must either enable or disable interrupts");
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__ASSERT(((flags & GPIO_INT_ENABLE) == 0) ||
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((flags & GPIO_INT_EDGE) != 0) ||
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((flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)) !=
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@ -630,7 +637,7 @@ static inline int z_impl_gpio_pin_interrupt_configure(struct device *port,
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}
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trig = (enum gpio_int_trig)(flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1));
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mode = (enum gpio_int_mode)(flags & (GPIO_INT_EDGE | GPIO_INT_ENABLE));
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mode = (enum gpio_int_mode)(flags & (GPIO_INT_EDGE | GPIO_INT_DISABLE | GPIO_INT_ENABLE));
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return api->pin_interrupt_configure(port, pin, mode, trig);
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}
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@ -687,7 +694,8 @@ static inline int gpio_pin_configure(struct device *port, u32_t pin,
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} else {
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data->invert &= ~BIT(pin);
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}
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if (api->pin_interrupt_configure) {
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if (((flags & (GPIO_INT_DISABLE | GPIO_INT_ENABLE)) != 0U)
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&& (api->pin_interrupt_configure != NULL)) {
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flags &= ~GPIO_INT_DEBOUNCE;
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ret = z_impl_gpio_pin_interrupt_configure(port, pin, flags);
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}
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@ -84,8 +84,8 @@
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#define GPIO_DIR_OUT (1 << 9) /* GPIO_OUTPUT */
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#define GPIO_PUD_PULL_UP GPIO_PULL_UP
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#define GPIO_PUD_PULL_DOWN GPIO_PULL_DOWN
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#define GPIO_INT_ACTIVE_LOW (1 << 15) /* GPIO_INT_LOW_0 */
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#define GPIO_INT_ACTIVE_HIGH (1 << 16) /* GPIO_INT_HIGH_1 */
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#define GPIO_INT_ACTIVE_LOW (1 << 16) /* GPIO_INT_LOW_0 */
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#define GPIO_INT_ACTIVE_HIGH (1 << 17) /* GPIO_INT_HIGH_1 */
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/** @endcond */
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/**
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