From 2b0a481291a6d6892b1493ef3dade665d26e7ee3 Mon Sep 17 00:00:00 2001
From: Henrik Brix Andersen <hebad@vestas.com>
Date: Wed, 28 Apr 2021 21:31:22 +0200
Subject: [PATCH] arch: arm: cortex-m: add support for clearing NXP MPU regions
 at boot

Clear NXP MPU regions at boot if CONFIG_INIT_ARCH_HW_AT_BOOT is
enabled.

Fixes: #34045

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
---
 arch/arm/core/aarch32/cortex_m/scb.c | 23 +++++++++++++++++++++--
 1 file changed, 21 insertions(+), 2 deletions(-)

diff --git a/arch/arm/core/aarch32/cortex_m/scb.c b/arch/arm/core/aarch32/cortex_m/scb.c
index aa5e9db6491..781776fd1c9 100644
--- a/arch/arm/core/aarch32/cortex_m/scb.c
+++ b/arch/arm/core/aarch32/cortex_m/scb.c
@@ -19,6 +19,11 @@
 #include <sys/util.h>
 #include <arch/arm/aarch32/cortex_m/cmsis.h>
 #include <linker/linker-defs.h>
+
+#if defined(CONFIG_CPU_HAS_NXP_MPU)
+#include <fsl_sysmpu.h>
+#endif
+
 /**
  *
  * @brief Reset the system
@@ -55,7 +60,21 @@ void z_arm_clear_arm_mpu_config(void)
 		ARM_MPU_ClrRegion(i);
 	}
 }
-#endif /* CONFIG_CPU_HAS_ARM_MPU */
+#elif CONFIG_CPU_HAS_NXP_MPU
+void z_arm_clear_arm_mpu_config(void)
+{
+	int i;
+
+	int num_regions = FSL_FEATURE_SYSMPU_DESCRIPTOR_COUNT;
+
+	SYSMPU_Enable(SYSMPU, false);
+
+	/* NXP MPU region 0 is reserved for the debugger */
+	for (i = 1; i < num_regions; i++) {
+		SYSMPU_RegionEnable(SYSMPU, i, false);
+	}
+}
+#endif /* CONFIG_CPU_HAS_NXP_MPU */
 
 #if defined(CONFIG_INIT_ARCH_HW_AT_BOOT)
 /**
@@ -78,7 +97,7 @@ void z_arm_init_arch_hw_at_boot(void)
 
 	/* Initialize System Control Block components */
 
-#if defined(CONFIG_CPU_HAS_ARM_MPU)
+#if defined(CONFIG_CPU_HAS_ARM_MPU) || defined(CONFIG_CPU_HAS_NXP_MPU)
 	/* Clear MPU region configuration */
 	z_arm_clear_arm_mpu_config();
 #endif /* CONFIG_CPU_HAS_ARM_MPU */