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tests: Add BL54L15/L15u DVK support

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Adds support for the BL54L15 and BL54L15u DVK boards.

Signed-off-by: Greg Leach <greg.leach@ezurio.com>
This commit is contained in:
Greg Leach 2025-04-07 08:08:38 +01:00 • committed by Benjamin Cabé
commit 2aff40b1b1
110 changed files with 2964 additions and 0 deletions
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31
tests/bluetooth/tester/boards/bl54l15_dvk_nrf54l15_cpuapp.conf Normal file
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# Copyright (c) 2025 Nordic Semiconductor ASA
# Copyright (c) 2025 Ezurio LLC
#
# SPDX-License-Identifier: Apache-2.0
# CONFIG_TEST enforces minimal logging, which we don't want
CONFIG_TEST=n
CONFIG_ASSERT=y
# Enable the option below to measure stack usage
#CONFIG_INIT_STACKS=y
CONFIG_THREAD_NAME=y
CONFIG_HW_STACK_PROTECTION=y
CONFIG_LOG=y
CONFIG_LOG_BUFFER_SIZE=4096
CONFIG_RTT_CONSOLE=y
CONFIG_LOG_BACKEND_RTT=y
CONFIG_LOG_BACKEND_RTT_MODE_DROP=y
CONFIG_LOG_BACKEND_RTT_MESSAGE_SIZE=256
CONFIG_USE_SEGGER_RTT=y
CONFIG_SEGGER_RTT_BUFFER_SIZE_UP=4096
CONFIG_LOG_BACKEND_SHOW_COLOR=n
CONFIG_LOG_PROCESS_THREAD_STACK_SIZE=1024
CONFIG_LOG_DEFAULT_LEVEL=3
CONFIG_BTTESTER_LOG_LEVEL_DBG=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_BTTESTER_BTP_CMD_THREAD_STACK_SIZE=3072

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tests/bluetooth/tester/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay Normal file
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/*
* Copyright (c) 2025 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
chosen {
zephyr,uart-pipe = &uart20;
};
};
&uart20 {
compatible = "nordic,nrf-uarte";
current-speed = <115200>;
status = "okay";
hw-flow-control;
};

31
tests/bluetooth/tester/boards/bl54l15u_dvk_nrf54l15_cpuapp.conf Normal file
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# Copyright (c) 2025 Nordic Semiconductor ASA
# Copyright (c) 2025 Ezurio LLC
#
# SPDX-License-Identifier: Apache-2.0
# CONFIG_TEST enforces minimal logging, which we don't want
CONFIG_TEST=n
CONFIG_ASSERT=y
# Enable the option below to measure stack usage
#CONFIG_INIT_STACKS=y
CONFIG_THREAD_NAME=y
CONFIG_HW_STACK_PROTECTION=y
CONFIG_LOG=y
CONFIG_LOG_BUFFER_SIZE=4096
CONFIG_RTT_CONSOLE=y
CONFIG_LOG_BACKEND_RTT=y
CONFIG_LOG_BACKEND_RTT_MODE_DROP=y
CONFIG_LOG_BACKEND_RTT_MESSAGE_SIZE=256
CONFIG_USE_SEGGER_RTT=y
CONFIG_SEGGER_RTT_BUFFER_SIZE_UP=4096
CONFIG_LOG_BACKEND_SHOW_COLOR=n
CONFIG_LOG_PROCESS_THREAD_STACK_SIZE=1024
CONFIG_LOG_DEFAULT_LEVEL=3
CONFIG_BTTESTER_LOG_LEVEL_DBG=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_BTTESTER_BTP_CMD_THREAD_STACK_SIZE=3072

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tests/bluetooth/tester/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay Normal file
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/*
* Copyright (c) 2025 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
chosen {
zephyr,uart-pipe = &uart20;
};
};
&uart20 {
compatible = "nordic,nrf-uarte";
current-speed = <115200>;
status = "okay";
hw-flow-control;
};

41
tests/boards/nrf/comp/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay Normal file
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/*
* Copyright (c) 2025 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
aliases {
test-comp = &comp;
};
zephyr,user {
first-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
second-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
};
};
&led3 {
status = "disabled";
};
&button0 {
status = "disabled";
};
&gpio1 {
status = "okay";
};
&comp {
status = "okay";
psel = "AIN4";
refsel = "AREF";
extrefsel= "AIN3";
sp-mode = "NORMAL";
th-up = <36>;
th-down = <30>;
isource = "DISABLED";
enable-hyst;
};

41
tests/boards/nrf/comp/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay Normal file
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/*
* Copyright (c) 2025 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
aliases {
test-comp = &comp;
};
zephyr,user {
first-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
second-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
};
};
&led3 {
status = "disabled";
};
&button0 {
status = "disabled";
};
&gpio1 {
status = "okay";
};
&comp {
status = "okay";
psel = "AIN4";
refsel = "AREF";
extrefsel= "AIN3";
sp-mode = "NORMAL";
th-up = <36>;
th-down = <30>;
isource = "DISABLED";
enable-hyst;
};

10
tests/boards/nrf/hwinfo/reset_cause/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay Normal file
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&wdt31 {
status = "okay";
};

10
tests/boards/nrf/hwinfo/reset_cause/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay Normal file
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&wdt31 {
status = "okay";
};

5
tests/boards/nrf/i2c/i2c_slave/boards/bl54l15_dvk_nrf54l15_cpuapp.conf Normal file
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# Copyright 2024 Nordic Semiconductor ASA
# Copyright 2025 Ezurio LLC
# SPDX-License-Identifier: Apache-2.0
CONFIG_NRFX_TWIS22=y

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tests/boards/nrf/i2c/i2c_slave/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay Normal file
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/*
* Copyright 2024 Nordic Semiconductor ASA
* Copyright 2025 Ezurio LLC
* SPDX-License-Identifier: Apache-2.0
*/
/ {
aliases {
i2c-slave = &i2c22;
};
};
&pinctrl {
i2c21_default_alt: i2c21_default_alt {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 8)>,
<NRF_PSEL(TWIM_SCL, 1, 12)>;
};
};
i2c21_sleep_alt: i2c21_sleep_alt {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 8)>,
<NRF_PSEL(TWIM_SCL, 1, 12)>;
low-power-enable;
};
};
i2c22_default_alt: i2c22_default_alt {
group1 {
/* Temporary workaround as it is currently not possible
* to configure pins for TWIS with pinctrl.
*/
psels = <NRF_PSEL(TWIM_SDA, 1, 9)>,
<NRF_PSEL(TWIM_SCL, 1, 13)>;
bias-pull-up;
};
};
i2c22_sleep_alt: i2c22_sleep_alt {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 9)>,
<NRF_PSEL(TWIM_SCL, 1, 13)>;
low-power-enable;
};
};
};
&i2c21 {
compatible = "nordic,nrf-twim";
status = "okay";
pinctrl-0 = <&i2c21_default_alt>;
pinctrl-1 = <&i2c21_sleep_alt>;
pinctrl-names = "default", "sleep";
sensor: sensor@54 {
reg = <0x54>;
};
};
&i2c22 {
compatible = "nordic,nrf-twis";
status = "okay";
pinctrl-0 = <&i2c22_default_alt>;
pinctrl-1 = <&i2c22_sleep_alt>;
pinctrl-names = "default", "sleep";
};

5
tests/boards/nrf/i2c/i2c_slave/boards/bl54l15u_dvk_nrf54l15_cpuapp.conf Normal file
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# Copyright 2024 Nordic Semiconductor ASA
# Copyright 2025 Ezurio LLC
# SPDX-License-Identifier: Apache-2.0
CONFIG_NRFX_TWIS22=y

67
tests/boards/nrf/i2c/i2c_slave/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay Normal file
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/*
* Copyright 2024 Nordic Semiconductor ASA
* Copyright 2025 Ezurio LLC
* SPDX-License-Identifier: Apache-2.0
*/
/ {
aliases {
i2c-slave = &i2c22;
};
};
&pinctrl {
i2c21_default_alt: i2c21_default_alt {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 8)>,
<NRF_PSEL(TWIM_SCL, 1, 12)>;
};
};
i2c21_sleep_alt: i2c21_sleep_alt {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 8)>,
<NRF_PSEL(TWIM_SCL, 1, 12)>;
low-power-enable;
};
};
i2c22_default_alt: i2c22_default_alt {
group1 {
/* Temporary workaround as it is currently not possible
* to configure pins for TWIS with pinctrl.
*/
psels = <NRF_PSEL(TWIM_SDA, 1, 9)>,
<NRF_PSEL(TWIM_SCL, 1, 13)>;
bias-pull-up;
};
};
i2c22_sleep_alt: i2c22_sleep_alt {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 9)>,
<NRF_PSEL(TWIM_SCL, 1, 13)>;
low-power-enable;
};
};
};
&i2c21 {
compatible = "nordic,nrf-twim";
status = "okay";
pinctrl-0 = <&i2c21_default_alt>;
pinctrl-1 = <&i2c21_sleep_alt>;
pinctrl-names = "default", "sleep";
sensor: sensor@54 {
reg = <0x54>;
};
};
&i2c22 {
compatible = "nordic,nrf-twis";
status = "okay";
pinctrl-0 = <&i2c22_default_alt>;
pinctrl-1 = <&i2c22_sleep_alt>;
pinctrl-names = "default", "sleep";
};

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tests/boards/nrf/qdec/boards/bl54l15_dvk_nrf54l15_common.dtsi Normal file
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/*
* Copyright 2024 Nordic Semiconductor ASA
* Copyright 2025 Ezurio LLC
* SPDX-License-Identifier: Apache-2.0
*/
/ {
aliases {
qdec0 = &qdec20;
qenca = &phase_a;
qencb = &phase_b;
};
encoder-emulate {
compatible = "gpio-leds";
phase_a: phase_a {
gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
};
phase_b: phase_b {
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
};
};
};
&pinctrl {
qdec_pinctrl: qdec_pinctrl {
group1 {
psels = <NRF_PSEL(QDEC_A, 1, 8)>,
<NRF_PSEL(QDEC_B, 1, 10)>;
};
};
qdec_sleep_pinctrl: qdec_sleep_pinctrl {
group1 {
psels = <NRF_PSEL(QDEC_A, 1, 8)>,
<NRF_PSEL(QDEC_B, 1, 10)>;
low-power-enable;
};
};
};
&gpio1 {
status = "okay";
};
&qdec20 {
status = "okay";
pinctrl-0 = <&qdec_pinctrl>;
pinctrl-1 = <&qdec_sleep_pinctrl>;
pinctrl-names = "default", "sleep";
steps = <127>;
led-pre = <500>;
zephyr,pm-device-runtime-auto;
};

12
tests/boards/nrf/qdec/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay Normal file
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/*
* Copyright 2024 Nordic Semiconductor ASA
* Copyright 2025 Ezurio LLC
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15_dvk_nrf54l15_common.dtsi"
/* To prevent enabling console receiver. */
&uart20 {
disable-rx;
};

12
tests/boards/nrf/qdec/boards/bl54l15_dvk_nrf54l15_cpuflpr.overlay Normal file
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/*
* Copyright 2024 Nordic Semiconductor ASA
* Copyright 2025 Ezurio LLC
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15_dvk_nrf54l15_common.dtsi"
/* To prevent enabling console receiver. */
&uart30 {
disable-rx;
};

56
tests/boards/nrf/qdec/boards/bl54l15u_dvk_nrf54l15_common.dtsi Normal file
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/*
* Copyright 2024 Nordic Semiconductor ASA
* Copyright 2025 Ezurio LLC
* SPDX-License-Identifier: Apache-2.0
*/
/ {
aliases {
qdec0 = &qdec20;
qenca = &phase_a;
qencb = &phase_b;
};
encoder-emulate {
compatible = "gpio-leds";
phase_a: phase_a {
gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
};
phase_b: phase_b {
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
};
};
};
&pinctrl {
qdec_pinctrl: qdec_pinctrl {
group1 {
psels = <NRF_PSEL(QDEC_A, 1, 8)>,
<NRF_PSEL(QDEC_B, 1, 10)>;
};
};
qdec_sleep_pinctrl: qdec_sleep_pinctrl {
group1 {
psels = <NRF_PSEL(QDEC_A, 1, 8)>,
<NRF_PSEL(QDEC_B, 1, 10)>;
low-power-enable;
};
};
};
&gpio1 {
status = "okay";
};
&qdec20 {
status = "okay";
pinctrl-0 = <&qdec_pinctrl>;
pinctrl-1 = <&qdec_sleep_pinctrl>;
pinctrl-names = "default", "sleep";
steps = <127>;
led-pre = <500>;
zephyr,pm-device-runtime-auto;
};

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/*
* Copyright 2024 Nordic Semiconductor ASA
* Copyright 2025 Ezurio LLC
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15u_dvk_nrf54l15_common.dtsi"
/* To prevent enabling console receiver. */
&uart20 {
disable-rx;
};

12
tests/boards/nrf/qdec/boards/bl54l15u_dvk_nrf54l15_cpuflpr.overlay Normal file
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/*
* Copyright 2024 Nordic Semiconductor ASA
* Copyright 2025 Ezurio LLC
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15u_dvk_nrf54l15_common.dtsi"
/* To prevent enabling console receiver. */
&uart30 {
disable-rx;
};

28
tests/drivers/adc/adc_accuracy_test/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay Normal file
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/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*/
/ {
zephyr,user {
io-channels = <&adc 0>;
reference-mv = <1800>;
expected-accuracy = <64>;
};
};
&adc {
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
zephyr,gain = "ADC_GAIN_1_2";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,input-positive = <NRF_SAADC_AIN2>;
zephyr,resolution = <14>;
};
};

28
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@ -0,0 +1,28 @@
/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*/
/ {
zephyr,user {
io-channels = <&adc 0>;
reference-mv = <1800>;
expected-accuracy = <64>;
};
};
&adc {
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
zephyr,gain = "ADC_GAIN_1_2";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,input-positive = <NRF_SAADC_AIN2>;
zephyr,resolution = <14>;
};
};

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tests/drivers/adc/adc_api/boards/bl54l15_dvk_nrf54l10_cpuapp.overlay Normal file
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/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*/
/ {
zephyr,user {
io-channels = <&adc 0>, <&adc 1> , <&adc 2>;
};
};
&adc {
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME(ADC_ACQ_TIME_MICROSECONDS, 10)>;
zephyr,input-positive = <NRF_SAADC_AIN1>;
zephyr,resolution = <10>;
};
channel@1 {
reg = <1>;
zephyr,gain = "ADC_GAIN_1_4";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,input-positive = <NRF_SAADC_AIN4>;
zephyr,resolution = <12>;
};
channel@2 {
reg = <2>;
zephyr,gain = "ADC_GAIN_2_3";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME(ADC_ACQ_TIME_MICROSECONDS, 10)>;
zephyr,input-positive = <NRF_SAADC_AIN2>;
zephyr,resolution = <10>;
};
};

44
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/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*/
/ {
zephyr,user {
io-channels = <&adc 0>, <&adc 1> , <&adc 2>;
};
};
&adc {
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME(ADC_ACQ_TIME_MICROSECONDS, 10)>;
zephyr,input-positive = <NRF_SAADC_AIN1>;
zephyr,resolution = <10>;
};
channel@1 {
reg = <1>;
zephyr,gain = "ADC_GAIN_1_4";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,input-positive = <NRF_SAADC_AIN4>;
zephyr,resolution = <12>;
};
channel@2 {
reg = <2>;
zephyr,gain = "ADC_GAIN_2_3";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME(ADC_ACQ_TIME_MICROSECONDS, 10)>;
zephyr,input-positive = <NRF_SAADC_AIN2>;
zephyr,resolution = <10>;
};
};

44
tests/drivers/adc/adc_api/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay Normal file
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/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*/
/ {
zephyr,user {
io-channels = <&adc 0>, <&adc 1> , <&adc 2>;
};
};
&adc {
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME(ADC_ACQ_TIME_MICROSECONDS, 10)>;
zephyr,input-positive = <NRF_SAADC_AIN1>;
zephyr,resolution = <10>;
};
channel@1 {
reg = <1>;
zephyr,gain = "ADC_GAIN_1_4";
zephyr,reference = "ADC_REF_EXTERNAL0";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,input-positive = <NRF_SAADC_AIN4>;
zephyr,resolution = <12>;
};
channel@2 {
reg = <2>;
zephyr,gain = "ADC_GAIN_2_3";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME(ADC_ACQ_TIME_MICROSECONDS, 10)>;
zephyr,input-positive = <NRF_SAADC_AIN2>;
zephyr,resolution = <10>;
};
};

3
tests/drivers/adc/adc_api/testcase.yaml
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@ -12,6 +12,9 @@ tests:
- panb511evb/nrf54l15/cpuapp
- nrf54l15dk/nrf54l15/cpuapp/ns
- nrf54l15dk/nrf54l10/cpuapp/ns
- bl54l15_dvk/nrf54l10/cpuapp/ns
- bl54l15_dvk/nrf54l15/cpuapp/ns
- bl54l15u_dvk/nrf54l15/cpuapp/ns
drivers.adc.b_u585i_iot02a_adc4:
extra_args:
- DTC_OVERLAY_FILE="boards/b_u585i_iot02a_adc4.overlay"

12
tests/drivers/adc/adc_error_cases/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay Normal file
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/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*/
/ {
aliases {
adc = &adc;
};
};

12
tests/drivers/adc/adc_error_cases/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay Normal file
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/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*/
/ {
aliases {
adc = &adc;
};
};

28
tests/drivers/audio/dmic_api/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay Normal file
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
aliases {
dmic-dev = &pdm20;
};
};
&pinctrl {
pdm20_default_alt: pdm20_default_alt {
group1 {
psels = <NRF_PSEL(PDM_CLK, 1, 12)>,
<NRF_PSEL(PDM_DIN, 1, 13)>;
};
};
};
dmic_dev: &pdm20 {
status = "okay";
pinctrl-0 = <&pdm20_default_alt>;
pinctrl-names = "default";
clock-source = "PCLK32M";
};

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
aliases {
dmic-dev = &pdm20;
};
};
&pinctrl {
pdm20_default_alt: pdm20_default_alt {
group1 {
psels = <NRF_PSEL(PDM_CLK, 1, 12)>,
<NRF_PSEL(PDM_DIN, 1, 13)>;
};
};
};
dmic_dev: &pdm20 {
status = "okay";
pinctrl-0 = <&pdm20_default_alt>;
pinctrl-names = "default";
clock-source = "PCLK32M";
};

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/*
* Copyright (c) 2024 Nordic Semiconductor
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/dt-bindings/gpio/gpio.h>
/*
* P1.10 looped back to P1.11
*/
/ {
aliases {
test-comp = &comp;
};
zephyr,user {
test-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
};
};
&gpio1 {
status = "okay";
};

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/*
* Copyright (c) 2024 Nordic Semiconductor
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/dt-bindings/gpio/gpio.h>
/*
* P1.10 looped back to P1.11
*/
/ {
aliases {
test-comp = &comp;
};
zephyr,user {
test-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
};
};
&gpio1 {
status = "okay";
};

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/*
* Copyright (c) 2024 Nordic Semiconductor
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&comp {
main-mode = "SE";
psel = "AIN4"; /* P1.11 */
refsel = "INT_1V2";
sp-mode = "HIGH";
th-up = <63>;
th-down = <59>;
isource = "DISABLED";
status = "okay";
};

17
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/*
* Copyright (c) 2024 Nordic Semiconductor
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&comp {
main-mode = "SE";
psel = "AIN4"; /* P1.11 */
refsel = "INT_1V2";
sp-mode = "HIGH";
th-up = <63>;
th-down = <59>;
isource = "DISABLED";
status = "okay";
};

13
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/*
* Copyright (c) 2024 Nordic Semiconductor
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&comp {
compatible = "nordic,nrf-lpcomp";
psel = "AIN4"; /* P1.11 */
refsel = "VDD_4_8";
status = "okay";
};

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/*
* Copyright (c) 2024 Nordic Semiconductor
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&comp {
compatible = "nordic,nrf-lpcomp";
psel = "AIN4"; /* P1.11 */
refsel = "VDD_4_8";
status = "okay";
};

8
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15_dvk_nrf54l15_cpuapp.overlay"

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&timer00 {
prescaler = <6>;
status = "okay";
};
&timer10 {
prescaler = <4>;
status = "okay";
};
&timer20 {
prescaler = <4>;
status = "okay";
};
&timer21 {
prescaler = <4>;
status = "okay";
};
&timer22 {
prescaler = <4>;
status = "okay";
};
&timer23 {
prescaler = <4>;
status = "okay";
};
&timer24 {
prescaler = <4>;
status = "okay";
};

8
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15_dvk_nrf54l15_common.dtsi"

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15_dvk_nrf54l15_common.dtsi"

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&timer00 {
prescaler = <6>;
status = "okay";
};
&timer10 {
prescaler = <4>;
status = "okay";
};
&timer20 {
prescaler = <4>;
status = "okay";
};
&timer21 {
prescaler = <4>;
status = "okay";
};
&timer22 {
prescaler = <4>;
status = "okay";
};
&timer23 {
prescaler = <4>;
status = "okay";
};
&timer24 {
prescaler = <4>;
status = "okay";
};

8
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15u_dvk_nrf54l15_common.dtsi"

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15u_dvk_nrf54l15_common.dtsi"

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
resources {
compatible = "test-gpio-basic-api";
out-gpios = <&gpio1 10 0>;
in-gpios = <&gpio1 11 0>;
};
};
&gpiote20 {
status = "okay";
};
&gpio1 {
status = "okay";
};

8
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15_dvk_nrf54l15_cpuapp.overlay"

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15_dvk_nrf54l15_cpuapp.overlay"

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
resources {
compatible = "test-gpio-basic-api";
out-gpios = <&gpio1 10 0>;
in-gpios = <&gpio1 11 0>;
};
};
&gpiote20 {
status = "okay";
};
&gpio1 {
status = "okay";
};

8
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15u_dvk_nrf54l15_cpuapp.overlay"

8
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15u_dvk_nrf54l15_cpuapp.overlay"

5
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# Copyright (c) 2024 Nordic Semiconductor ASA
# Copyright (c) 2025 Ezurio LLC
# SPDX-License-Identifier: Apache-2.0
CONFIG_I2C_NRFX_TWIS_BUF_SIZE=256

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* SDA = P1.8 and P1.9
* SCL = P1.10 and P1.11
*/
&pinctrl {
i2c21_default: i2c21_default {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 8)>,
<NRF_PSEL(TWIS_SCL, 1, 10)>;
bias-pull-up;
};
};
i2c21_sleep: i2c21_sleep {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 8)>,
<NRF_PSEL(TWIS_SCL, 1, 10)>;
low-power-enable;
};
};
i2c22_default: i2c22_default {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 9)>,
<NRF_PSEL(TWIS_SCL, 1, 11)>;
bias-pull-up;
};
};
i2c22_sleep: i2c22_sleep {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 9)>,
<NRF_PSEL(TWIS_SCL, 1, 11)>;
low-power-enable;
};
};
};
&i2c21 {
pinctrl-0 = <&i2c21_default>;
pinctrl-1 = <&i2c21_sleep>;
pinctrl-names = "default", "sleep";
zephyr,concat-buf-size = <256>;
status = "okay";
eeprom1: eeprom@56 {
compatible = "zephyr,i2c-target-eeprom";
reg = <0x56>;
address-width = <8>;
size = <256>;
};
};
&i2c22 {
compatible = "nordic,nrf-twis";
pinctrl-0 = <&i2c22_default>;
pinctrl-1 = <&i2c22_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
eeprom0: eeprom@54 {
compatible = "zephyr,i2c-target-eeprom";
reg = <0x54>;
address-width = <8>;
size = <256>;
};
};

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# Copyright (c) 2024 Nordic Semiconductor ASA
# Copyright (c) 2025 Ezurio LLC
# SPDX-License-Identifier: Apache-2.0
CONFIG_I2C_NRFX_TWIS_BUF_SIZE=256

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* SDA = P1.8 and P1.9
* SCL = P1.10 and P1.11
*/
&pinctrl {
i2c21_default: i2c21_default {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 8)>,
<NRF_PSEL(TWIS_SCL, 1, 10)>;
bias-pull-up;
};
};
i2c21_sleep: i2c21_sleep {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 8)>,
<NRF_PSEL(TWIS_SCL, 1, 10)>;
low-power-enable;
};
};
i2c22_default: i2c22_default {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 9)>,
<NRF_PSEL(TWIS_SCL, 1, 11)>;
bias-pull-up;
};
};
i2c22_sleep: i2c22_sleep {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 9)>,
<NRF_PSEL(TWIS_SCL, 1, 11)>;
low-power-enable;
};
};
};
&i2c21 {
pinctrl-0 = <&i2c21_default>;
pinctrl-1 = <&i2c21_sleep>;
pinctrl-names = "default", "sleep";
zephyr,concat-buf-size = <256>;
status = "okay";
eeprom1: eeprom@56 {
compatible = "zephyr,i2c-target-eeprom";
reg = <0x56>;
address-width = <8>;
size = <256>;
};
};
&i2c22 {
compatible = "nordic,nrf-twis";
pinctrl-0 = <&i2c22_default>;
pinctrl-1 = <&i2c22_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
eeprom0: eeprom@54 {
compatible = "zephyr,i2c-target-eeprom";
reg = <0x54>;
address-width = <8>;
size = <256>;
};
};

8
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15_dvk_nrf54l15_cpuapp.overlay"

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/* i2s-node0 is the transmitter/receiver */
/ {
aliases {
i2s-node0 = &i2s20;
};
};
&pinctrl {
i2s20_default_alt: i2s20_default_alt {
group1 {
psels = <NRF_PSEL(I2S_SCK_M, 1, 11)>,
<NRF_PSEL(I2S_LRCK_M, 1, 12)>,
<NRF_PSEL(I2S_SDOUT, 1, 8)>,
<NRF_PSEL(I2S_SDIN, 1, 9)>;
};
};
};
&i2s20 {
status = "okay";
pinctrl-0 = <&i2s20_default_alt>;
pinctrl-names = "default";
};

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/* i2s-node0 is the transmitter/receiver */
/ {
aliases {
i2s-node0 = &i2s20;
};
};
&pinctrl {
i2s20_default_alt: i2s20_default_alt {
group1 {
psels = <NRF_PSEL(I2S_SCK_M, 1, 11)>,
<NRF_PSEL(I2S_LRCK_M, 1, 12)>,
<NRF_PSEL(I2S_SDOUT, 1, 8)>,
<NRF_PSEL(I2S_SDIN, 1, 9)>;
};
};
};
&i2s20 {
status = "okay";
pinctrl-0 = <&i2s20_default_alt>;
pinctrl-names = "default";
};

8
tests/drivers/i2s/i2s_speed/boards/bl54l15_dvk_nrf54l10_cpuapp.overlay Normal file
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15_dvk_nrf54l15_cpuapp.overlay"

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/* i2s-node0 is the transmitter/receiver */
/ {
aliases {
i2s-node0 = &i2s20;
};
};
&pinctrl {
i2s20_default_alt: i2s20_default_alt {
group1 {
psels = <NRF_PSEL(I2S_SCK_M, 1, 11)>,
<NRF_PSEL(I2S_LRCK_M, 1, 12)>,
<NRF_PSEL(I2S_SDOUT, 1, 8)>,
<NRF_PSEL(I2S_SDIN, 1, 9)>;
};
};
};
&i2s20 {
status = "okay";
pinctrl-0 = <&i2s20_default_alt>;
pinctrl-names = "default";
};

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/* i2s-node0 is the transmitter/receiver */
/ {
aliases {
i2s-node0 = &i2s20;
};
};
&pinctrl {
i2s20_default_alt: i2s20_default_alt {
group1 {
psels = <NRF_PSEL(I2S_SCK_M, 1, 11)>,
<NRF_PSEL(I2S_LRCK_M, 1, 12)>,
<NRF_PSEL(I2S_SDOUT, 1, 8)>,
<NRF_PSEL(I2S_SDIN, 1, 9)>;
};
};
};
&i2s20 {
status = "okay";
pinctrl-0 = <&i2s20_default_alt>;
pinctrl-names = "default";
};

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/*
* Copyright 2024 Nordic Semiconductor ASA
* Copyright 2025 Ezurio LLC
* SPDX-License-Identifier: Apache-2.0
*/
/ {
mbox-consumer {
compatible = "vnd,mbox-consumer";
mboxes = <&cpuapp_vevif_tx 21>, <&cpuapp_vevif_tx 32>,
<&cpuapp_vevif_rx 20>, <&cpuapp_vevif_rx 32>;
mbox-names = "remote_valid", "remote_incorrect",
"local_valid", "local_incorrect";
};
};
&cpuapp_vevif_rx {
status = "okay";
};
&cpuapp_vevif_tx {
status = "okay";
};

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/*
* Copyright 2024 Nordic Semiconductor ASA
* Copyright 2025 Ezurio LLC
* SPDX-License-Identifier: Apache-2.0
*/
/ {
mbox-consumer {
compatible = "vnd,mbox-consumer";
mboxes = <&cpuapp_vevif_tx 21>, <&cpuapp_vevif_tx 32>,
<&cpuapp_vevif_rx 20>, <&cpuapp_vevif_rx 32>;
mbox-names = "remote_valid", "remote_incorrect",
"local_valid", "local_incorrect";
};
};
&cpuapp_vevif_rx {
status = "okay";
};
&cpuapp_vevif_tx {
status = "okay";
};

5
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# Copyright (c) 2024 Nordic Semiconductor ASA
# Copyright (c) 2025 Ezurio LLC
# SPDX-License-Identifier: Apache-2.0
CONFIG_SKIP_EDGE_NUM=4

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
* SPDX-License-Identifier: Apache-2.0
*
* Test requires jumper between:
* - PWM20 OUT[0] at P1.10 <-> GPIO input at P1.11
*/
/ {
zephyr,user {
pwms = <&pwm20 0 160000 PWM_POLARITY_NORMAL>;
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
};
};

5
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# Copyright (c) 2024 Nordic Semiconductor ASA
# Copyright (c) 2025 Ezurio LLC
# SPDX-License-Identifier: Apache-2.0
CONFIG_SKIP_EDGE_NUM=4

15
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
* SPDX-License-Identifier: Apache-2.0
*
* Test requires jumper between:
* - PWM20 OUT[0] at P1.10 <-> GPIO input at P1.11
*/
/ {
zephyr,user {
pwms = <&pwm20 0 160000 PWM_POLARITY_NORMAL>;
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
};
};

6
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# Copyright (c) 2024 Nordic Semiconductor ASA
# Copyright (c) 2025 Ezurio LLC
#
# SPDX-License-Identifier: Apache-2.0
CONFIG_POWEROFF=y

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
cpuapp_sram@2002f000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x2002f000 DT_SIZE_K(4)>;
zephyr,memory-region = "RetainedMem";
status = "okay";
retainedmem0: retainedmem {
compatible = "zephyr,retained-ram";
status = "okay";
};
};
aliases {
retainedmemtestdevice = &retainedmem0;
};
};
&cpuapp_sram {
/* Shrink SRAM size to avoid overlap with retained memory region:
* 192 - 4 = 188KB = 0x2f000
*/
reg = <0x20000000 0x2f000>;
ranges = <0x0 0x20000000 0x2f000>;
};

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# Copyright (c) 2024 Nordic Semiconductor ASA
# Copyright (c) 2025 Ezurio LLC
#
# SPDX-License-Identifier: Apache-2.0
CONFIG_POWEROFF=y

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
cpuapp_sram@2002e000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x2002e000 DT_SIZE_K(4)>;
zephyr,memory-region = "RetainedMem";
status = "okay";
retainedmem0: retainedmem {
compatible = "zephyr,retained-ram";
status = "okay";
};
};
aliases {
retainedmemtestdevice = &retainedmem0;
};
};
&cpuapp_sram {
reg = <0x20000000 DT_SIZE_K(184)>;
ranges = <0x0 0x20000000 0x2e000>;
};

8
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#
# Copyright (c) 2024 Nordic Semiconductor ASA
# Copyright (c) 2025 Ezurio LLC
#
# SPDX-License-Identifier: Apache-2.0
#
CONFIG_POWEROFF=y

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
cpuapp_sram@2002e000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x2002e000 DT_SIZE_K(4)>;
zephyr,memory-region = "RetainedMem";
status = "okay";
retainedmem0: retainedmem {
compatible = "zephyr,retained-ram";
status = "okay";
};
};
aliases {
retainedmemtestdevice = &retainedmem0;
};
};
&cpuapp_sram {
reg = <0x20000000 DT_SIZE_K(184)>;
ranges = <0x0 0x20000000 0x2e000>;
};

10
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
temp_sensor: &temp {
status = "okay";
};

10
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
temp_sensor: &temp {
status = "okay";
};

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/*
* Copyright (c) 2024 Nordic Semiconductor
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
spi22_default_alt: spi22_default_alt {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 11)>,
<NRF_PSEL(SPIM_MOSI, 1, 9)>;
};
};
spi22_sleep_alt: spi22_sleep_alt {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 11)>,
<NRF_PSEL(SPIM_MOSI, 1, 9)>;
low-power-enable;
};
};
spi21_default_alt: spi21_default_alt {
group1 {
psels = <NRF_PSEL(SPIS_SCK, 1, 12)>,
<NRF_PSEL(SPIS_MISO, 1, 10)>,
<NRF_PSEL(SPIS_MOSI, 1, 8)>,
<NRF_PSEL(SPIS_CSN, 1, 14)>;
};
};
spi21_sleep_alt: spi21_sleep_alt {
group1 {
psels = <NRF_PSEL(SPIS_SCK, 1, 12)>,
<NRF_PSEL(SPIS_MISO, 1, 10)>,
<NRF_PSEL(SPIS_MOSI, 1, 8)>,
<NRF_PSEL(SPIS_CSN, 1, 14)>;
low-power-enable;
};
};
};
&gpio2 {
status = "okay";
};
&spi22 {
status = "okay";
pinctrl-0 = <&spi22_default_alt>;
pinctrl-1 = <&spi22_sleep_alt>;
pinctrl-names = "default", "sleep";
overrun-character = <0x00>;
cs-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
zephyr,pm-device-runtime-auto;
dut_spi_dt: test-spi-dev@0 {
compatible = "vnd,spi-device";
reg = <0>;
spi-max-frequency = <DT_FREQ_M(16)>;
};
};
dut_spis: &spi21 {
compatible = "nordic,nrf-spis";
status = "okay";
def-char = <0x00>;
pinctrl-0 = <&spi21_default_alt>;
pinctrl-1 = <&spi21_sleep_alt>;
pinctrl-names = "default", "sleep";
/delete-property/rx-delay-supported;
/delete-property/rx-delay;
zephyr,pm-device-runtime-auto;
};

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/*
* Copyright (c) 2024 Nordic Semiconductor
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
spi22_default_alt: spi22_default_alt {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 11)>,
<NRF_PSEL(SPIM_MOSI, 1, 9)>;
};
};
spi22_sleep_alt: spi22_sleep_alt {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 11)>,
<NRF_PSEL(SPIM_MOSI, 1, 9)>;
low-power-enable;
};
};
spi21_default_alt: spi21_default_alt {
group1 {
psels = <NRF_PSEL(SPIS_SCK, 1, 12)>,
<NRF_PSEL(SPIS_MISO, 1, 10)>,
<NRF_PSEL(SPIS_MOSI, 1, 8)>,
<NRF_PSEL(SPIS_CSN, 1, 14)>;
};
};
spi21_sleep_alt: spi21_sleep_alt {
group1 {
psels = <NRF_PSEL(SPIS_SCK, 1, 12)>,
<NRF_PSEL(SPIS_MISO, 1, 10)>,
<NRF_PSEL(SPIS_MOSI, 1, 8)>,
<NRF_PSEL(SPIS_CSN, 1, 14)>;
low-power-enable;
};
};
};
&gpio2 {
status = "okay";
};
&spi22 {
status = "okay";
pinctrl-0 = <&spi22_default_alt>;
pinctrl-1 = <&spi22_sleep_alt>;
pinctrl-names = "default", "sleep";
overrun-character = <0x00>;
cs-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
zephyr,pm-device-runtime-auto;
dut_spi_dt: test-spi-dev@0 {
compatible = "vnd,spi-device";
reg = <0>;
spi-max-frequency = <DT_FREQ_M(16)>;
};
};
dut_spis: &spi21 {
compatible = "nordic,nrf-spis";
status = "okay";
def-char = <0x00>;
pinctrl-0 = <&spi21_default_alt>;
pinctrl-1 = <&spi21_sleep_alt>;
pinctrl-names = "default", "sleep";
/delete-property/rx-delay-supported;
/delete-property/rx-delay;
zephyr,pm-device-runtime-auto;
};

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/*
* Copyright (c) 2024 Nordic Semiconductor
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
spi22_default_alt: spi22_default_alt {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 11)>,
<NRF_PSEL(SPIM_MOSI, 1, 9)>;
};
};
spi22_sleep_alt: spi22_sleep_alt {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 11)>,
<NRF_PSEL(SPIM_MOSI, 1, 9)>;
low-power-enable;
};
};
spi21_default_alt: spi21_default_alt {
group1 {
psels = <NRF_PSEL(SPIS_SCK, 1, 12)>,
<NRF_PSEL(SPIS_MISO, 1, 10)>,
<NRF_PSEL(SPIS_MOSI, 1, 8)>,
<NRF_PSEL(SPIS_CSN, 1, 14)>;
};
};
spi21_sleep_alt: spi21_sleep_alt {
group1 {
psels = <NRF_PSEL(SPIS_SCK, 1, 12)>,
<NRF_PSEL(SPIS_MISO, 1, 10)>,
<NRF_PSEL(SPIS_MOSI, 1, 8)>,
<NRF_PSEL(SPIS_CSN, 1, 14)>;
low-power-enable;
};
};
};
&gpio2 {
status = "okay";
};
&spi22 {
status = "okay";
pinctrl-0 = <&spi22_default_alt>;
pinctrl-1 = <&spi22_sleep_alt>;
pinctrl-names = "default", "sleep";
overrun-character = <0x00>;
cs-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
dut_spi_dt: test-spi-dev@0 {
compatible = "vnd,spi-device";
reg = <0>;
spi-max-frequency = <4000000>;
};
};
dut_spis: &spi21 {
compatible = "nordic,nrf-spis";
status = "okay";
def-char = <0x00>;
pinctrl-0 = <&spi21_default_alt>;
pinctrl-1 = <&spi21_sleep_alt>;
pinctrl-names = "default", "sleep";
/delete-property/rx-delay-supported;
/delete-property/rx-delay;
};

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/*
* Copyright (c) 2024 Nordic Semiconductor
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
spi22_default_alt: spi22_default_alt {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 11)>,
<NRF_PSEL(SPIM_MOSI, 1, 9)>;
};
};
spi22_sleep_alt: spi22_sleep_alt {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 11)>,
<NRF_PSEL(SPIM_MOSI, 1, 9)>;
low-power-enable;
};
};
spi21_default_alt: spi21_default_alt {
group1 {
psels = <NRF_PSEL(SPIS_SCK, 1, 12)>,
<NRF_PSEL(SPIS_MISO, 1, 10)>,
<NRF_PSEL(SPIS_MOSI, 1, 8)>,
<NRF_PSEL(SPIS_CSN, 1, 14)>;
};
};
spi21_sleep_alt: spi21_sleep_alt {
group1 {
psels = <NRF_PSEL(SPIS_SCK, 1, 12)>,
<NRF_PSEL(SPIS_MISO, 1, 10)>,
<NRF_PSEL(SPIS_MOSI, 1, 8)>,
<NRF_PSEL(SPIS_CSN, 1, 14)>;
low-power-enable;
};
};
};
&gpio2 {
status = "okay";
};
&spi22 {
status = "okay";
pinctrl-0 = <&spi22_default_alt>;
pinctrl-1 = <&spi22_sleep_alt>;
pinctrl-names = "default", "sleep";
overrun-character = <0x00>;
cs-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
dut_spi_dt: test-spi-dev@0 {
compatible = "vnd,spi-device";
reg = <0>;
spi-max-frequency = <4000000>;
};
};
dut_spis: &spi21 {
compatible = "nordic,nrf-spis";
status = "okay";
def-char = <0x00>;
pinctrl-0 = <&spi21_default_alt>;
pinctrl-1 = <&spi21_sleep_alt>;
pinctrl-names = "default", "sleep";
/delete-property/rx-delay-supported;
/delete-property/rx-delay;
};

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
spi00_default: spi00_default {
group1 {
psels = <NRF_PSEL(SPIM_MISO, 2, 9)>;
};
group2 {
psels = <NRF_PSEL(SPIM_SCK, 2, 6)>,
<NRF_PSEL(SPIM_MOSI, 2, 8)>;
nordic,drive-mode = <NRF_DRIVE_E0E1>;
};
};
spi00_sleep: spi00_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 2, 6)>,
<NRF_PSEL(SPIM_MISO, 2, 9)>,
<NRF_PSEL(SPIM_MOSI, 2, 8)>;
low-power-enable;
};
};
};
/delete-node/ &mx25r64;
&spi00 {
status = "okay";
pinctrl-0 = <&spi00_default>;
pinctrl-1 = <&spi00_sleep>;
pinctrl-names = "default", "sleep";
overrun-character = <0x00>;
zephyr,pm-device-runtime-auto;
slow@0 {
compatible = "test-spi-loopback-slow";
reg = <0>;
spi-max-frequency = <DT_FREQ_M(2)>;
};
dut_fast: fast@0 {
compatible = "test-spi-loopback-fast";
reg = <0>;
spi-max-frequency = <DT_FREQ_M(4)>;
};
};
&gpio2 {
status = "okay";
};

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
spi00_default: spi00_default {
group1 {
psels = <NRF_PSEL(SPIM_MISO, 2, 9)>;
};
group2 {
psels = <NRF_PSEL(SPIM_SCK, 2, 6)>,
<NRF_PSEL(SPIM_MOSI, 2, 8)>;
nordic,drive-mode = <NRF_DRIVE_E0E1>;
};
};
spi00_sleep: spi00_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 2, 6)>,
<NRF_PSEL(SPIM_MISO, 2, 9)>,
<NRF_PSEL(SPIM_MOSI, 2, 8)>;
low-power-enable;
};
};
};
/delete-node/ &mx25r64;
&spi00 {
status = "okay";
pinctrl-0 = <&spi00_default>;
pinctrl-1 = <&spi00_sleep>;
pinctrl-names = "default", "sleep";
overrun-character = <0x00>;
zephyr,pm-device-runtime-auto;
slow@0 {
compatible = "test-spi-loopback-slow";
reg = <0>;
spi-max-frequency = <DT_FREQ_M(2)>;
};
dut_fast: fast@0 {
compatible = "test-spi-loopback-fast";
reg = <0>;
spi-max-frequency = <DT_FREQ_M(4)>;
};
};
&gpio2 {
status = "okay";
};

8
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15_dvk_nrf54l15_cpuapp.overlay"

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&spi00 {
status = "disabled";
};
&pinctrl {
uart21_default_alt: uart21_default_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>;
};
};
uart21_sleep_alt: uart21_sleep_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>;
low-power-enable;
};
};
uart00_default_alt: uart00_default_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 2, 8)>,
<NRF_PSEL(UART_RX, 2, 7)>;
};
};
uart00_sleep_alt: uart00_sleep_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 2, 8)>,
<NRF_PSEL(UART_RX, 2, 7)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
pinctrl-0 = <&uart21_default_alt>;
pinctrl-1 = <&uart21_sleep_alt>;
pinctrl-names = "default", "sleep";
current-speed = <115200>;
};
dut2: &uart00 {
status = "okay";
pinctrl-0 = <&uart00_default_alt>;
pinctrl-1 = <&uart00_sleep_alt>;
pinctrl-names = "default", "sleep";
current-speed = <4000000>;
};

8
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15_dvk_nrf54l15_cpuapp.overlay"

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&spi00 {
status = "disabled";
};
&pinctrl {
uart21_default_alt: uart21_default_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>;
};
};
uart21_sleep_alt: uart21_sleep_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>;
low-power-enable;
};
};
uart00_default_alt: uart00_default_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 2, 8)>,
<NRF_PSEL(UART_RX, 2, 7)>;
};
};
uart00_sleep_alt: uart00_sleep_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 2, 8)>,
<NRF_PSEL(UART_RX, 2, 7)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
pinctrl-0 = <&uart21_default_alt>;
pinctrl-1 = <&uart21_sleep_alt>;
pinctrl-names = "default", "sleep";
current-speed = <115200>;
};
dut2: &uart00 {
status = "okay";
pinctrl-0 = <&uart00_default_alt>;
pinctrl-1 = <&uart00_sleep_alt>;
pinctrl-names = "default", "sleep";
current-speed = <4000000>;
};

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "bl54l15u_dvk_nrf54l15_cpuapp.overlay"

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_RTS, 1, 8)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_RTS, 1, 8)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
hw-flow-control;
};

56
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 8)>;
bias-pull-up;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 8)>;
low-power-enable;
};
};
uart22_default: uart22_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 9)>,
<NRF_PSEL(UART_RX, 1, 11)>;
bias-pull-up;
};
};
uart22_sleep: uart22_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 9)>,
<NRF_PSEL(UART_RX, 1, 11)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
};
dut_aux: &uart22 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart22_default>;
pinctrl-1 = <&uart22_sleep>;
pinctrl-names = "default", "sleep";
};

36
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_RTS, 1, 8)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_RTS, 1, 8)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
hw-flow-control;
};

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 8)>;
bias-pull-up;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 8)>;
low-power-enable;
};
};
uart22_default: uart22_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 9)>,
<NRF_PSEL(UART_RX, 1, 11)>;
bias-pull-up;
};
};
uart22_sleep: uart22_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 9)>,
<NRF_PSEL(UART_RX, 1, 11)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
};
dut_aux: &uart22 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart22_default>;
pinctrl-1 = <&uart22_sleep>;
pinctrl-names = "default", "sleep";
};

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_RTS, 1, 8)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_RTS, 1, 8)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
hw-flow-control;
};

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 8)>;
bias-pull-up;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 8)>;
low-power-enable;
};
};
uart22_default: uart22_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 9)>,
<NRF_PSEL(UART_RX, 1, 11)>;
bias-pull-up;
};
};
uart22_sleep: uart22_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 9)>,
<NRF_PSEL(UART_RX, 1, 11)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
};
dut_aux: &uart22 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart22_default>;
pinctrl-1 = <&uart22_sleep>;
pinctrl-names = "default", "sleep";
};

36
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_RTS, 1, 8)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_RTS, 1, 8)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
hw-flow-control;
};

56
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 8)>;
bias-pull-up;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 8)>;
low-power-enable;
};
};
uart22_default: uart22_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 9)>,
<NRF_PSEL(UART_RX, 1, 11)>;
bias-pull-up;
};
};
uart22_sleep: uart22_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 9)>,
<NRF_PSEL(UART_RX, 1, 11)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
};
dut_aux: &uart22 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart22_default>;
pinctrl-1 = <&uart22_sleep>;
pinctrl-names = "default", "sleep";
};

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_RX, 1, 8)>,
<NRF_PSEL(UART_RTS, 1, 10)>;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_RX, 1, 8)>,
<NRF_PSEL(UART_RTS, 1, 10)>;
low-power-enable;
};
};
uart22_default: uart22_default {
group1 {
psels =
<NRF_PSEL(UART_CTS, 1, 11)>;
bias-pull-up;
};
group2 {
psels = <NRF_PSEL(UART_TX, 1, 9)>;
};
};
uart22_sleep: uart22_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 9)>,
<NRF_PSEL(UART_CTS, 1, 11)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
};
dut_aux: &uart22 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart22_default>;
pinctrl-1 = <&uart22_sleep>;
pinctrl-names = "default", "sleep";
disable-rx;
};

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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_RX, 1, 8)>,
<NRF_PSEL(UART_RTS, 1, 10)>;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_RX, 1, 8)>,
<NRF_PSEL(UART_RTS, 1, 10)>;
low-power-enable;
};
};
uart22_default: uart22_default {
group1 {
psels =
<NRF_PSEL(UART_CTS, 1, 11)>;
bias-pull-up;
};
group2 {
psels = <NRF_PSEL(UART_TX, 1, 9)>;
};
};
uart22_sleep: uart22_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 9)>,
<NRF_PSEL(UART_CTS, 1, 11)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
};
dut_aux: &uart22 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart22_default>;
pinctrl-1 = <&uart22_sleep>;
pinctrl-names = "default", "sleep";
disable-rx;
};

44
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_RTS, 1, 8)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_RTS, 1, 8)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
hw-flow-control;
};
counter_dev: &timer00 {
status = "okay";
};
&grtc {
interrupts = <228 2>;
};

44
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_RTS, 1, 8)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_RTS, 1, 8)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
hw-flow-control;
};
counter_dev: &timer00 {
status = "okay";
};
&grtc {
interrupts = <228 2>;
};

37
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>;
low-power-enable;
};
};
};
/ {
chosen {
zephyr,console = &uart20;
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
};

37
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>;
low-power-enable;
};
};
};
/ {
chosen {
zephyr,console = &uart20;
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
};

10
tests/drivers/watchdog/wdt_basic_api/boards/bl54l15_dvk_nrf54l10_cpuapp.overlay Normal file
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&wdt31 {
status = "okay";
};

10
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&wdt31 {
status = "okay";
};

10
tests/drivers/watchdog/wdt_basic_api/boards/bl54l15_dvk_nrf54l15_cpuflpr.overlay Normal file
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/*
* Copyright 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&wdt31 {
status = "okay";
};

10
tests/drivers/watchdog/wdt_basic_api/boards/bl54l15_dvk_nrf54l15_cpuflpr_xip.overlay Normal file
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/*
* Copyright 2024 Nordic Semiconductor ASA
* Copyright (c) 2025 Ezurio LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
&wdt31 {
status = "okay";
};

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