diff --git a/arch/arm/core/fatal.c b/arch/arm/core/fatal.c index a049c91cece..1c296128549 100644 --- a/arch/arm/core/fatal.c +++ b/arch/arm/core/fatal.c @@ -38,14 +38,15 @@ * Define a default ESF for use with _NanoFatalErrorHandler() in the event * the caller does not have a NANO_ESF to pass */ -const NANO_ESF _default_esf = {0xdeaddead, /* a1 */ - 0xdeaddead, /* a2 */ - 0xdeaddead, /* a3 */ - 0xdeaddead, /* a4 */ - 0xdeaddead, /* ip */ - 0xdeaddead, /* lr */ - 0xdeaddead, /* pc */ - 0xdeaddead, /* xpsr */ +const NANO_ESF _default_esf = { + {0xdeaddead}, /* r0/a1 */ + {0xdeaddead}, /* r1/a2 */ + {0xdeaddead}, /* r2/a3 */ + {0xdeaddead}, /* r3/a4 */ + {0xdeaddead}, /* r12/ip */ + {0xdeaddead}, /* r14/lr */ + {0xdeaddead}, /* r15/pc */ + 0xdeaddead, /* xpsr */ }; /** diff --git a/include/arch/arm/cortex_m/exc.h b/include/arch/arm/cortex_m/exc.h index 7e04e98f138..7a96ff8ce2a 100644 --- a/include/arch/arm/cortex_m/exc.h +++ b/include/arch/arm/cortex_m/exc.h @@ -34,13 +34,13 @@ GTEXT(_ExcExit); #include struct __esf { - uint32_t a1; /* r0 */ - uint32_t a2; /* r1 */ - uint32_t a3; /* r2 */ - uint32_t a4; /* r3 */ - uint32_t ip; /* r12 */ - uint32_t lr; /* r14 */ - uint32_t pc; /* r15 */ + sys_define_gpr_with_alias(a1, r0); + sys_define_gpr_with_alias(a2, r1); + sys_define_gpr_with_alias(a3, r2); + sys_define_gpr_with_alias(a4, r3); + sys_define_gpr_with_alias(ip, r12); + sys_define_gpr_with_alias(lr, r14); + sys_define_gpr_with_alias(pc, r15); uint32_t xpsr; };